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fhahnfhahn
authoredFeb 10, 2024
[IndVars] Preserve flags of narrow IV inc if replacing with wider inc. (#80446)
We are replacing a narrow IV increment with a wider one. If the original (narrow) increment did not wrap, the wider one should not wrap either. Set the flags to be the union of both wide increment and original increment; this ensures we preserve flags SCEV could infer for the wider increment. Fixes #71517.
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‎llvm/lib/Transforms/Utils/SimplifyIndVar.cpp

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1985,7 +1985,28 @@ PHINode *WidenIV::createWideIV(SCEVExpander &Rewriter) {
19851985
// increment to the new (widened) increment.
19861986
auto *OrigInc =
19871987
cast<Instruction>(OrigPhi->getIncomingValueForBlock(LatchBlock));
1988+
19881989
WideInc->setDebugLoc(OrigInc->getDebugLoc());
1990+
// We are replacing a narrow IV increment with a wider IV increment. If
1991+
// the original (narrow) increment did not wrap, the wider increment one
1992+
// should not wrap either. Set the flags to be the union of both wide
1993+
// increment and original increment; this ensures we preserve flags SCEV
1994+
// could infer for the wider increment. Limit this only to cases where
1995+
// both increments directly increment the corresponding PHI nodes and have
1996+
// the same opcode. It is not safe to re-use the flags from the original
1997+
// increment, if it is more complex and SCEV expansion may have yielded a
1998+
// more simplified wider increment.
1999+
bool MatchingOps =
2000+
match(OrigInc, m_c_BinOp(m_Specific(OrigPhi), m_Value())) &&
2001+
match(WideInc, m_c_BinOp(m_Specific(WidePhi), m_Value())) &&
2002+
OrigInc->getOpcode() == WideInc->getOpcode();
2003+
if (MatchingOps && isa<OverflowingBinaryOperator>(OrigInc) &&
2004+
isa<OverflowingBinaryOperator>(WideInc)) {
2005+
WideInc->setHasNoUnsignedWrap(WideInc->hasNoUnsignedWrap() ||
2006+
OrigInc->hasNoUnsignedWrap());
2007+
WideInc->setHasNoSignedWrap(WideInc->hasNoSignedWrap() ||
2008+
OrigInc->hasNoSignedWrap());
2009+
}
19892010
}
19902011
}
19912012

‎llvm/test/Transforms/IndVarSimplify/X86/pr27133.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ define i32 @fn2() personality ptr @__CxxFrameHandler3 {
1111
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
1212
; CHECK-NEXT: [[INDVARS1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
1313
; CHECK-NEXT: invoke void @fn1(i64 [[INDVARS_IV]])
14-
; CHECK-NEXT: to label [[FOR_INC]] unwind label [[CATCH_DISPATCH:%.*]]
14+
; CHECK-NEXT: to label [[FOR_INC]] unwind label [[CATCH_DISPATCH:%.*]]
1515
; CHECK: catch.dispatch:
1616
; CHECK-NEXT: [[C_0_LCSSA:%.*]] = phi i32 [ [[INDVARS1]], [[FOR_COND]] ]
1717
; CHECK-NEXT: [[TMP0:%.*]] = catchswitch within none [label %catch] unwind to caller
@@ -21,7 +21,7 @@ define i32 @fn2() personality ptr @__CxxFrameHandler3 {
2121
; CHECK: exit:
2222
; CHECK-NEXT: ret i32 [[C_0_LCSSA]]
2323
; CHECK: for.inc:
24-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw i64 [[INDVARS_IV]], 1
24+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
2525
; CHECK-NEXT: br label [[FOR_COND]]
2626
;
2727
entry:

‎llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -148,7 +148,7 @@ define void @guardedloop(ptr %matrix, ptr %vector,
148148
; CHECK-NEXT: [[VECTORP:%.*]] = getelementptr inbounds [0 x double], ptr [[VECTOR:%.*]], i32 0, i64 [[INDVARS_IV2]]
149149
; CHECK-NEXT: [[V2:%.*]] = load double, ptr [[VECTORP]], align 8
150150
; CHECK-NEXT: call void @use(double [[V2]])
151-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], [[TMP0]]
151+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
152152
; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1
153153
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], [[WIDE_TRIP_COUNT]]
154154
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[RETURN_LOOPEXIT:%.*]]

‎llvm/test/Transforms/IndVarSimplify/pr30806-phi-scev.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ define void @foo(ptr %buf, i32 %denominator, ptr %flag) local_unnamed_addr {
4343
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_LR_PH]] ]
4444
; CHECK-NEXT: [[BUF_ADDR_07:%.*]] = phi ptr [ [[BUF]], [[WHILE_BODY_LR_PH]] ], [ [[CALL:%.*]], [[WHILE_BODY]] ]
4545
; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[DIV]] to i64
46-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], [[TMP2]]
46+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], [[TMP2]]
4747
; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @theSize, align 4
4848
; CHECK-NEXT: store i32 [[TMP3]], ptr [[I]], align 4
4949
; CHECK-NEXT: call void @bar(ptr nonnull [[I]], i64 [[INDVARS_IV_NEXT]])

‎llvm/test/Transforms/IndVarSimplify/preserve-nsw-during-expansion.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ define void @test_s172(i32 noundef %xa, i32 noundef %xb, ptr nocapture noundef %
2323
; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
2424
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[TMP2]]
2525
; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX2]], align 4
26-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], [[TMP1]]
26+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], [[TMP1]]
2727
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT]], 32000
2828
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]], !llvm.loop [[LOOP0:![0-9]+]]
2929
; CHECK: for.end.loopexit:

‎llvm/test/Transforms/IndVarSimplify/widen-i32-i8ptr.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ define dso_local void @Widen_i32_i8ptr() local_unnamed_addr {
1515
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[GID_0]], i64 1
1616
; CHECK-NEXT: [[ARRAYIDX2115:%.*]] = getelementptr inbounds [15 x ptr], ptr [[PTRIDS]], i64 0, i64 [[INDVARS_IV]]
1717
; CHECK-NEXT: store ptr [[GID_0]], ptr [[ARRAYIDX2115]], align 8
18-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw i64 [[INDVARS_IV]], 1
18+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
1919
; CHECK-NEXT: br label [[FOR_COND2106]]
2020
;
2121
entry:

‎llvm/test/Transforms/LoopFlatten/widen-iv.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ define void @foo(ptr %A, i32 %N, i32 %M) {
3636
; CHECK-NEXT: tail call void @f(ptr [[ARRAYIDX_US]])
3737
; CHECK-NEXT: br label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]]
3838
; CHECK: for.cond1.for.cond.cleanup3_crit_edge.us:
39-
; CHECK-NEXT: [[INDVAR_NEXT3]] = add i64 [[INDVAR2]], 1
39+
; CHECK-NEXT: [[INDVAR_NEXT3]] = add nuw nsw i64 [[INDVAR2]], 1
4040
; CHECK-NEXT: [[CMP_US:%.*]] = icmp slt i64 [[INDVAR_NEXT3]], [[FLATTEN_TRIPCOUNT]]
4141
; CHECK-NEXT: br i1 [[CMP_US]], label [[FOR_COND1_PREHEADER_US]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]]
4242
; CHECK: for.cond.cleanup.loopexit:
@@ -143,7 +143,7 @@ define void @foo2_sext(ptr nocapture readonly %A, i32 %N, i32 %M) {
143143
; CHECK-NEXT: tail call void @g(i32 [[TMP2]])
144144
; CHECK-NEXT: br label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]]
145145
; CHECK: for.cond1.for.cond.cleanup3_crit_edge.us:
146-
; CHECK-NEXT: [[INDVAR_NEXT3]] = add i64 [[INDVAR2]], 1
146+
; CHECK-NEXT: [[INDVAR_NEXT3]] = add nuw nsw i64 [[INDVAR2]], 1
147147
; CHECK-NEXT: [[CMP_US:%.*]] = icmp slt i64 [[INDVAR_NEXT3]], [[FLATTEN_TRIPCOUNT]]
148148
; CHECK-NEXT: br i1 [[CMP_US]], label [[FOR_COND1_PREHEADER_US]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]]
149149
; CHECK: for.cond1.preheader:
@@ -1005,7 +1005,7 @@ define void @foo_M_sext(ptr %A, i32 %N, i16 %M) {
10051005
; CHECK-NEXT: tail call void @f(ptr [[ARRAYIDX_US]])
10061006
; CHECK-NEXT: br label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]]
10071007
; CHECK: for.cond1.for.cond.cleanup3_crit_edge.us:
1008-
; CHECK-NEXT: [[INDVAR_NEXT3]] = add i64 [[INDVAR2]], 1
1008+
; CHECK-NEXT: [[INDVAR_NEXT3]] = add nuw nsw i64 [[INDVAR2]], 1
10091009
; CHECK-NEXT: [[CMP_US:%.*]] = icmp slt i64 [[INDVAR_NEXT3]], [[FLATTEN_TRIPCOUNT]]
10101010
; CHECK-NEXT: br i1 [[CMP_US]], label [[FOR_COND1_PREHEADER_US]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]]
10111011
; CHECK: for.cond.cleanup.loopexit:

‎llvm/test/Transforms/LoopFlatten/widen-iv2.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -45,12 +45,12 @@ define dso_local i32 @fn1() local_unnamed_addr #0 {
4545
; CHECK-NEXT: [[IDXPROM_US:%.*]] = sext i32 [[ADD_US]] to i64
4646
; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 [[TMP7]]
4747
; CHECK-NEXT: store i32 32, ptr [[ARRAYIDX_US]], align 4
48-
; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
48+
; CHECK-NEXT: [[INDVAR_NEXT]] = add nuw nsw i64 [[INDVAR]], 1
4949
; CHECK-NEXT: [[INC_US]] = add nuw nsw i32 [[J_014_US]], 1
5050
; CHECK-NEXT: [[CMP2_US:%.*]] = icmp slt i64 [[INDVAR_NEXT]], [[TMP1]]
5151
; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY3_US]], label [[FOR_COND1_FOR_INC4_CRIT_EDGE_US]]
5252
; CHECK: for.cond1.for.inc4_crit_edge.us:
53-
; CHECK-NEXT: [[INDVAR_NEXT3]] = add i64 [[INDVAR2]], 1
53+
; CHECK-NEXT: [[INDVAR_NEXT3]] = add nuw nsw i64 [[INDVAR2]], 1
5454
; CHECK-NEXT: [[INC5_US]] = add nuw nsw i32 [[I_016_US]], 1
5555
; CHECK-NEXT: [[CMP_US:%.*]] = icmp slt i64 [[INDVAR_NEXT3]], [[TMP3]]
5656
; CHECK-NEXT: br i1 [[CMP_US]], label [[FOR_COND1_PREHEADER_US]], label [[FOR_END6_LOOPEXIT:%.*]]

‎llvm/test/Transforms/LoopFlatten/widen-iv3.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ define i16 @foo() {
2525
; CHECK-NEXT: ret i16 [[ADD5_LCSSA_LCSSA]]
2626
; CHECK: for.cond.cleanup3:
2727
; CHECK-NEXT: [[ADD5_LCSSA]] = phi i16 [ [[ADD5:%.*]], [[FOR_BODY4]] ]
28-
; CHECK-NEXT: [[INDVAR_NEXT3]] = add i32 [[INDVAR2]], 1
28+
; CHECK-NEXT: [[INDVAR_NEXT3]] = add nuw nsw i32 [[INDVAR2]], 1
2929
; CHECK-NEXT: [[INC7]] = add nuw nsw i16 [[I_013]], 1
3030
; CHECK-NEXT: [[EXITCOND14_NOT:%.*]] = icmp eq i32 [[INDVAR_NEXT3]], 4
3131
; CHECK-NEXT: br i1 [[EXITCOND14_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]]
@@ -39,7 +39,7 @@ define i16 @foo() {
3939
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [64 x i16], ptr @v, i16 0, i16 [[TMP3]]
4040
; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr [[ARRAYIDX]], align 1
4141
; CHECK-NEXT: [[ADD5]] = add nsw i16 [[TMP4]], [[SUM_110]]
42-
; CHECK-NEXT: [[INDVAR_NEXT]] = add i32 [[INDVAR]], 1
42+
; CHECK-NEXT: [[INDVAR_NEXT]] = add nuw nsw i32 [[INDVAR]], 1
4343
; CHECK-NEXT: [[INC]] = add nuw nsw i16 [[J_011]], 1
4444
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[INDVAR_NEXT]], 16
4545
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4]]

‎llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll

Lines changed: 76 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -14,18 +14,81 @@ define void @s172(i32 noundef %xa, i32 noundef %xb, ptr noundef %a, ptr noundef
1414
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[XA]], -1
1515
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[SUB]] to i64
1616
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[XB]] to i64
17+
; CHECK-NEXT: [[TMP2:%.*]] = add nsw i64 [[TMP1]], [[TMP0]]
18+
; CHECK-NEXT: [[SMAX7:%.*]] = tail call i64 @llvm.smax.i64(i64 [[TMP2]], i64 32000)
19+
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i64 [[TMP2]], 32000
20+
; CHECK-NEXT: [[UMIN8:%.*]] = zext i1 [[TMP3]] to i64
21+
; CHECK-NEXT: [[TMP4:%.*]] = add nsw i64 [[TMP2]], [[UMIN8]]
22+
; CHECK-NEXT: [[TMP5:%.*]] = sub i64 [[SMAX7]], [[TMP4]]
23+
; CHECK-NEXT: [[UMAX9:%.*]] = tail call i64 @llvm.umax.i64(i64 [[TMP1]], i64 1)
24+
; CHECK-NEXT: [[TMP6:%.*]] = udiv i64 [[TMP5]], [[UMAX9]]
25+
; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[TMP6]], [[UMIN8]]
26+
; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 1
27+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ugt i64 [[TMP8]], 23
28+
; CHECK-NEXT: [[IDENT_CHECK_NOT:%.*]] = icmp eq i32 [[XB]], 1
29+
; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[MIN_ITERS_CHECK]], [[IDENT_CHECK_NOT]]
30+
; CHECK-NEXT: br i1 [[OR_COND]], label [[VECTOR_MEMCHECK:%.*]], label [[FOR_BODY_PREHEADER13:%.*]]
31+
; CHECK: vector.memcheck:
32+
; CHECK-NEXT: [[TMP9:%.*]] = shl nsw i64 [[TMP0]], 2
33+
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP9]]
34+
; CHECK-NEXT: [[TMP10:%.*]] = add nsw i64 [[TMP1]], [[TMP0]]
35+
; CHECK-NEXT: [[SMAX:%.*]] = tail call i64 @llvm.smax.i64(i64 [[TMP10]], i64 32000)
36+
; CHECK-NEXT: [[TMP11:%.*]] = icmp slt i64 [[TMP10]], 32000
37+
; CHECK-NEXT: [[UMIN:%.*]] = zext i1 [[TMP11]] to i64
38+
; CHECK-NEXT: [[TMP12:%.*]] = add nsw i64 [[TMP10]], [[UMIN]]
39+
; CHECK-NEXT: [[TMP13:%.*]] = sub i64 [[SMAX]], [[TMP12]]
40+
; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP13]], [[UMIN]]
41+
; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[TMP14]], [[TMP0]]
42+
; CHECK-NEXT: [[TMP16:%.*]] = shl i64 [[TMP15]], 2
43+
; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[TMP16]], 4
44+
; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP17]]
45+
; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP9]]
46+
; CHECK-NEXT: [[SCEVGEP6:%.*]] = getelementptr i8, ptr [[B]], i64 [[TMP17]]
47+
; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[SCEVGEP]], [[SCEVGEP6]]
48+
; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[SCEVGEP5]], [[SCEVGEP4]]
49+
; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
50+
; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[FOR_BODY_PREHEADER13]], label [[VECTOR_PH:%.*]]
51+
; CHECK: vector.ph:
52+
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP8]], -8
53+
; CHECK-NEXT: [[TMP18:%.*]] = mul nuw i64 [[N_VEC]], [[TMP1]]
54+
; CHECK-NEXT: [[IND_END:%.*]] = add i64 [[TMP18]], [[TMP0]]
55+
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
56+
; CHECK: vector.body:
57+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
58+
; CHECK-NEXT: [[TMP19:%.*]] = mul nuw i64 [[INDEX]], [[TMP1]]
59+
; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[TMP19]], [[TMP0]]
60+
; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[OFFSET_IDX]]
61+
; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i8, ptr [[TMP20]], i64 16
62+
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP20]], align 4, !alias.scope [[META0:![0-9]+]]
63+
; CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <4 x i32>, ptr [[TMP21]], align 4, !alias.scope [[META0]]
64+
; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[OFFSET_IDX]]
65+
; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds i8, ptr [[TMP22]], i64 16
66+
; CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <4 x i32>, ptr [[TMP22]], align 4, !alias.scope [[META3:![0-9]+]], !noalias [[META0]]
67+
; CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <4 x i32>, ptr [[TMP23]], align 4, !alias.scope [[META3]], !noalias [[META0]]
68+
; CHECK-NEXT: [[TMP24:%.*]] = add nsw <4 x i32> [[WIDE_LOAD11]], [[WIDE_LOAD]]
69+
; CHECK-NEXT: [[TMP25:%.*]] = add nsw <4 x i32> [[WIDE_LOAD12]], [[WIDE_LOAD10]]
70+
; CHECK-NEXT: store <4 x i32> [[TMP24]], ptr [[TMP22]], align 4, !alias.scope [[META3]], !noalias [[META0]]
71+
; CHECK-NEXT: store <4 x i32> [[TMP25]], ptr [[TMP23]], align 4, !alias.scope [[META3]], !noalias [[META0]]
72+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
73+
; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
74+
; CHECK-NEXT: br i1 [[TMP26]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
75+
; CHECK: middle.block:
76+
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP8]], [[N_VEC]]
77+
; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END]], label [[FOR_BODY_PREHEADER13]]
78+
; CHECK: for.body.preheader13:
79+
; CHECK-NEXT: [[INDVARS_IV_PH:%.*]] = phi i64 [ [[TMP0]], [[VECTOR_MEMCHECK]] ], [ [[TMP0]], [[FOR_BODY_PREHEADER]] ], [ [[IND_END]], [[MIDDLE_BLOCK]] ]
1780
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
1881
; CHECK: for.body:
19-
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[TMP0]], [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
82+
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ [[INDVARS_IV_PH]], [[FOR_BODY_PREHEADER13]] ]
2083
; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDVARS_IV]]
2184
; CHECK-NEXT: [[L_B:%.*]] = load i32, ptr [[GEP_B]], align 4
2285
; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV]]
2386
; CHECK-NEXT: [[L_A:%.*]] = load i32, ptr [[GEP_A]], align 4
2487
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[L_A]], [[L_B]]
2588
; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP_A]], align 4
26-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], [[TMP1]]
89+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], [[TMP1]]
2790
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT]], 32000
28-
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]], !llvm.loop [[LOOP0:![0-9]+]]
91+
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]], !llvm.loop [[LOOP9:![0-9]+]]
2992
; CHECK: for.end:
3093
; CHECK-NEXT: ret void
3194
;
@@ -63,6 +126,14 @@ for.end:
63126
!0 = distinct !{!0, !1}
64127
!1 = !{!"llvm.loop.mustprogress"}
65128
;.
66-
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]]}
67-
; CHECK: [[META1]] = !{!"llvm.loop.mustprogress"}
129+
; CHECK: [[META0]] = !{[[META1:![0-9]+]]}
130+
; CHECK: [[META1]] = distinct !{[[META1]], [[META2:![0-9]+]]}
131+
; CHECK: [[META2]] = distinct !{[[META2]], !"LVerDomain"}
132+
; CHECK: [[META3]] = !{[[META4:![0-9]+]]}
133+
; CHECK: [[META4]] = distinct !{[[META4]], [[META2]]}
134+
; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META6:![0-9]+]], [[META7:![0-9]+]], [[META8:![0-9]+]]}
135+
; CHECK: [[META6]] = !{!"llvm.loop.mustprogress"}
136+
; CHECK: [[META7]] = !{!"llvm.loop.isvectorized", i32 1}
137+
; CHECK: [[META8]] = !{!"llvm.loop.unroll.runtime.disable"}
138+
; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META6]], [[META7]]}
68139
;.

‎llvm/test/Transforms/PhaseOrdering/AArch64/loopflatten.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ define dso_local void @_Z3fooPiii(ptr %A, i32 %N, i32 %M) #0 {
2121
; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVAR6]]
2222
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX_US]], align 4
2323
; CHECK-NEXT: tail call void @_Z1fi(i32 [[TMP2]])
24-
; CHECK-NEXT: [[INDVAR_NEXT7]] = add nuw nsw i64 [[INDVAR6]], 1
24+
; CHECK-NEXT: [[INDVAR_NEXT7]] = add nuw i64 [[INDVAR6]], 1
2525
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVAR_NEXT7]], [[FLATTEN_TRIPCOUNT]]
2626
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_COND1_PREHEADER_US]]
2727
; CHECK: for.cond.cleanup:

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