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XinWang10XinWang10
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use multiclass to avoid messy
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4 files changed

+75
-289
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4 files changed

+75
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‎llvm/lib/Target/X86/X86InstrArithmetic.td

+10-13
Original file line numberDiff line numberDiff line change
@@ -1338,26 +1338,23 @@ defm ANDN32 : AndN<Xi32, "_EVEX">, EVEX, Requires<[HasBMI, HasEGPR, In64BitMode]
13381338
defm ANDN64 : AndN<Xi64, "_EVEX">, EVEX, REX_W, Requires<[HasBMI, HasEGPR, In64BitMode]>;
13391339
}
13401340

1341-
let Predicates = [HasBMI, NoEGPR], AddedComplexity = -6 in {
1341+
multiclass Andn_patterns<string Suffix = ""> {
13421342
def : Pat<(and (not GR32:$src1), GR32:$src2),
1343-
(ANDN32rr GR32:$src1, GR32:$src2)>;
1343+
(!cast<Instruction>(ANDN32rr#Suffix) GR32:$src1, GR32:$src2)>;
13441344
def : Pat<(and (not GR64:$src1), GR64:$src2),
1345-
(ANDN64rr GR64:$src1, GR64:$src2)>;
1345+
(!cast<Instruction>(ANDN64rr#Suffix) GR64:$src1, GR64:$src2)>;
13461346
def : Pat<(and (not GR32:$src1), (loadi32 addr:$src2)),
1347-
(ANDN32rm GR32:$src1, addr:$src2)>;
1347+
(!cast<Instruction>(ANDN32rm#Suffix) GR32:$src1, addr:$src2)>;
13481348
def : Pat<(and (not GR64:$src1), (loadi64 addr:$src2)),
1349-
(ANDN64rm GR64:$src1, addr:$src2)>;
1349+
(!cast<Instruction>(ANDN64rm#Suffix) GR64:$src1, addr:$src2)>;
1350+
}
1351+
1352+
let Predicates = [HasBMI, NoEGPR], AddedComplexity = -6 in {
1353+
defm : Andn_patterns<>;
13501354
}
13511355

13521356
let Predicates = [HasBMI, HasEGPR], AddedComplexity = -6 in {
1353-
def : Pat<(and (not GR32:$src1), GR32:$src2),
1354-
(ANDN32rr_EVEX GR32:$src1, GR32:$src2)>;
1355-
def : Pat<(and (not GR64:$src1), GR64:$src2),
1356-
(ANDN64rr_EVEX GR64:$src1, GR64:$src2)>;
1357-
def : Pat<(and (not GR32:$src1), (loadi32 addr:$src2)),
1358-
(ANDN32rm_EVEX GR32:$src1, addr:$src2)>;
1359-
def : Pat<(and (not GR64:$src1), (loadi64 addr:$src2)),
1360-
(ANDN64rm_EVEX GR64:$src1, addr:$src2)>;
1357+
defm : Andn_patterns<"_EVEX">;
13611358
}
13621359

13631360
//===----------------------------------------------------------------------===//

‎llvm/lib/Target/X86/X86InstrCompiler.td

+17-100
Original file line numberDiff line numberDiff line change
@@ -1864,120 +1864,37 @@ def : Pat<(fshl GR64:$src1, GR64:$src2, (shiftMask64 CL)),
18641864
def : Pat<(fshr GR64:$src2, GR64:$src1, (shiftMask64 CL)),
18651865
(SHRD64rrCL GR64:$src1, GR64:$src2)>;
18661866

1867-
let Predicates = [HasBMI2, NoEGPR] in {
1867+
multiclass bmi_shift_mask_patterns<SDNode op, string name, string Suffix = ""> {
18681868
let AddedComplexity = 1 in {
1869-
def : Pat<(sra GR32:$src1, (shiftMask32 GR8:$src2)),
1870-
(SARX32rr GR32:$src1,
1871-
(INSERT_SUBREG
1872-
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1873-
def : Pat<(sra GR64:$src1, (shiftMask64 GR8:$src2)),
1874-
(SARX64rr GR64:$src1,
1875-
(INSERT_SUBREG
1876-
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1877-
1878-
def : Pat<(srl GR32:$src1, (shiftMask32 GR8:$src2)),
1879-
(SHRX32rr GR32:$src1,
1880-
(INSERT_SUBREG
1881-
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1882-
def : Pat<(srl GR64:$src1, (shiftMask64 GR8:$src2)),
1883-
(SHRX64rr GR64:$src1,
1884-
(INSERT_SUBREG
1885-
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1886-
1887-
def : Pat<(shl GR32:$src1, (shiftMask32 GR8:$src2)),
1888-
(SHLX32rr GR32:$src1,
1869+
def : Pat<(op GR32:$src1, (shiftMask32 GR8:$src2)),
1870+
(!cast<Instruction>(name#"32rr"#Suffix) GR32:$src1,
18891871
(INSERT_SUBREG
18901872
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1891-
def : Pat<(shl GR64:$src1, (shiftMask64 GR8:$src2)),
1892-
(SHLX64rr GR64:$src1,
1873+
def : Pat<(op GR64:$src1, (shiftMask64 GR8:$src2)),
1874+
(!cast<Instruction>(name#"64rr"#Suffix) GR64:$src1,
18931875
(INSERT_SUBREG
18941876
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
18951877
}
1896-
1897-
def : Pat<(sra (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1898-
(SARX32rm addr:$src1,
1878+
def : Pat<(op (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1879+
(!cast<Instruction>(name#"32rm"#Suffix) addr:$src1,
18991880
(INSERT_SUBREG
19001881
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1901-
def : Pat<(sra (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1902-
(SARX64rm addr:$src1,
1903-
(INSERT_SUBREG
1904-
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1905-
1906-
def : Pat<(srl (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1907-
(SHRX32rm addr:$src1,
1908-
(INSERT_SUBREG
1909-
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1910-
def : Pat<(srl (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1911-
(SHRX64rm addr:$src1,
1882+
def : Pat<(op (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1883+
(!cast<Instruction>(name#"64rm"#Suffix) addr:$src1,
19121884
(INSERT_SUBREG
19131885
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1886+
}
19141887

1915-
def : Pat<(shl (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1916-
(SHLX32rm addr:$src1,
1917-
(INSERT_SUBREG
1918-
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1919-
def : Pat<(shl (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1920-
(SHLX64rm addr:$src1,
1921-
(INSERT_SUBREG
1922-
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1888+
let Predicates = [HasBMI2, NoEGPR] in {
1889+
defm : bmi_shift_mask_patterns<sra, "SARX">;
1890+
defm : bmi_shift_mask_patterns<srl, "SHRX">;
1891+
defm : bmi_shift_mask_patterns<shl, "SHLX">;
19231892
}
19241893

19251894
let Predicates = [HasBMI2, HasEGPR] in {
1926-
let AddedComplexity = 1 in {
1927-
def : Pat<(sra GR32:$src1, (shiftMask32 GR8:$src2)),
1928-
(SARX32rr_EVEX GR32:$src1,
1929-
(INSERT_SUBREG
1930-
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1931-
def : Pat<(sra GR64:$src1, (shiftMask64 GR8:$src2)),
1932-
(SARX64rr_EVEX GR64:$src1,
1933-
(INSERT_SUBREG
1934-
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1935-
1936-
def : Pat<(srl GR32:$src1, (shiftMask32 GR8:$src2)),
1937-
(SHRX32rr_EVEX GR32:$src1,
1938-
(INSERT_SUBREG
1939-
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1940-
def : Pat<(srl GR64:$src1, (shiftMask64 GR8:$src2)),
1941-
(SHRX64rr_EVEX GR64:$src1,
1942-
(INSERT_SUBREG
1943-
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1944-
1945-
def : Pat<(shl GR32:$src1, (shiftMask32 GR8:$src2)),
1946-
(SHLX32rr_EVEX GR32:$src1,
1947-
(INSERT_SUBREG
1948-
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1949-
def : Pat<(shl GR64:$src1, (shiftMask64 GR8:$src2)),
1950-
(SHLX64rr_EVEX GR64:$src1,
1951-
(INSERT_SUBREG
1952-
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1953-
}
1954-
1955-
def : Pat<(sra (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1956-
(SARX32rm_EVEX addr:$src1,
1957-
(INSERT_SUBREG
1958-
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1959-
def : Pat<(sra (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1960-
(SARX64rm_EVEX addr:$src1,
1961-
(INSERT_SUBREG
1962-
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1963-
1964-
def : Pat<(srl (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1965-
(SHRX32rm_EVEX addr:$src1,
1966-
(INSERT_SUBREG
1967-
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1968-
def : Pat<(srl (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1969-
(SHRX64rm_EVEX addr:$src1,
1970-
(INSERT_SUBREG
1971-
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1972-
1973-
def : Pat<(shl (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1974-
(SHLX32rm_EVEX addr:$src1,
1975-
(INSERT_SUBREG
1976-
(i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1977-
def : Pat<(shl (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1978-
(SHLX64rm_EVEX addr:$src1,
1979-
(INSERT_SUBREG
1980-
(i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1895+
defm : bmi_shift_mask_patterns<sra, "SARX", "_EVEX">;
1896+
defm : bmi_shift_mask_patterns<srl, "SHRX", "_EVEX">;
1897+
defm : bmi_shift_mask_patterns<shl, "SHLX", "_EVEX">;
19811898
}
19821899

19831900
// Use BTR/BTS/BTC for clearing/setting/toggling a bit in a variable location.

‎llvm/lib/Target/X86/X86InstrMisc.td

+17-44
Original file line numberDiff line numberDiff line change
@@ -1241,75 +1241,48 @@ let Predicates = [HasBMI, In64BitMode], Defs = [EFLAGS] in {
12411241
defm BLSI64 : Bls<"blsi", MRM3r, MRM3m, Xi64, "_EVEX">, EVEX;
12421242
}
12431243

1244-
let Predicates = [HasBMI, NoEGPR] in {
1244+
multiclass Bls_patterns<string Suffix = ""> {
12451245
// FIXME(1): patterns for the load versions are not implemented
12461246
// FIXME(2): By only matching `add_su` and `ineg_su` we may emit
12471247
// extra `mov` instructions if `src` has future uses. It may be better
12481248
// to always match if `src` has more users.
12491249
def : Pat<(and GR32:$src, (add_su GR32:$src, -1)),
1250-
(BLSR32rr GR32:$src)>;
1250+
(!cast<Instruction>(BLSR32rr#Suffix) GR32:$src)>;
12511251
def : Pat<(and GR64:$src, (add_su GR64:$src, -1)),
1252-
(BLSR64rr GR64:$src)>;
1252+
(!cast<Instruction>(BLSR64rr#Suffix) GR64:$src)>;
12531253

12541254
def : Pat<(xor GR32:$src, (add_su GR32:$src, -1)),
1255-
(BLSMSK32rr GR32:$src)>;
1255+
(!cast<Instruction>(BLSMSK32rr#Suffix) GR32:$src)>;
12561256
def : Pat<(xor GR64:$src, (add_su GR64:$src, -1)),
1257-
(BLSMSK64rr GR64:$src)>;
1257+
(!cast<Instruction>(BLSMSK64rr#Suffix) GR64:$src)>;
12581258

12591259
def : Pat<(and GR32:$src, (ineg_su GR32:$src)),
1260-
(BLSI32rr GR32:$src)>;
1260+
(!cast<Instruction>(BLSI32rr#Suffix) GR32:$src)>;
12611261
def : Pat<(and GR64:$src, (ineg_su GR64:$src)),
1262-
(BLSI64rr GR64:$src)>;
1262+
(!cast<Instruction>(BLSI64rr#Suffix) GR64:$src)>;
12631263

12641264
// Versions to match flag producing ops.
12651265
def : Pat<(and_flag_nocf GR32:$src, (add_su GR32:$src, -1)),
1266-
(BLSR32rr GR32:$src)>;
1266+
(!cast<Instruction>(BLSR32rr#Suffix) GR32:$src)>;
12671267
def : Pat<(and_flag_nocf GR64:$src, (add_su GR64:$src, -1)),
1268-
(BLSR64rr GR64:$src)>;
1268+
(!cast<Instruction>(BLSR64rr#Suffix) GR64:$src)>;
12691269

12701270
def : Pat<(xor_flag_nocf GR32:$src, (add_su GR32:$src, -1)),
1271-
(BLSMSK32rr GR32:$src)>;
1271+
(!cast<Instruction>(BLSMSK32rr#Suffix) GR32:$src)>;
12721272
def : Pat<(xor_flag_nocf GR64:$src, (add_su GR64:$src, -1)),
1273-
(BLSMSK64rr GR64:$src)>;
1273+
(!cast<Instruction>(BLSMSK64rr#Suffix) GR64:$src)>;
12741274

12751275
def : Pat<(and_flag_nocf GR32:$src, (ineg_su GR32:$src)),
1276-
(BLSI32rr GR32:$src)>;
1276+
(!cast<Instruction>(BLSI32rr#Suffix) GR32:$src)>;
12771277
def : Pat<(and_flag_nocf GR64:$src, (ineg_su GR64:$src)),
1278-
(BLSI64rr GR64:$src)>;
1278+
(!cast<Instruction>(BLSI64rr#Suffix) GR64:$src)>;
12791279
}
12801280

1281-
let Predicates = [HasBMI, HasEGPR] in {
1282-
def : Pat<(and GR32:$src, (add_su GR32:$src, -1)),
1283-
(BLSR32rr_EVEX GR32:$src)>;
1284-
def : Pat<(and GR64:$src, (add_su GR64:$src, -1)),
1285-
(BLSR64rr_EVEX GR64:$src)>;
1286-
1287-
def : Pat<(xor GR32:$src, (add_su GR32:$src, -1)),
1288-
(BLSMSK32rr_EVEX GR32:$src)>;
1289-
def : Pat<(xor GR64:$src, (add_su GR64:$src, -1)),
1290-
(BLSMSK64rr_EVEX GR64:$src)>;
1291-
1292-
def : Pat<(and GR32:$src, (ineg_su GR32:$src)),
1293-
(BLSI32rr_EVEX GR32:$src)>;
1294-
def : Pat<(and GR64:$src, (ineg_su GR64:$src)),
1295-
(BLSI64rr_EVEX GR64:$src)>;
1296-
1297-
// Versions to match flag producing ops.
1298-
def : Pat<(and_flag_nocf GR32:$src, (add_su GR32:$src, -1)),
1299-
(BLSR32rr_EVEX GR32:$src)>;
1300-
def : Pat<(and_flag_nocf GR64:$src, (add_su GR64:$src, -1)),
1301-
(BLSR64rr_EVEX GR64:$src)>;
1281+
let Predicates = [HasBMI, NoEGPR] in
1282+
defm : Bls_patterns<>;
13021283

1303-
def : Pat<(xor_flag_nocf GR32:$src, (add_su GR32:$src, -1)),
1304-
(BLSMSK32rr_EVEX GR32:$src)>;
1305-
def : Pat<(xor_flag_nocf GR64:$src, (add_su GR64:$src, -1)),
1306-
(BLSMSK64rr_EVEX GR64:$src)>;
1307-
1308-
def : Pat<(and_flag_nocf GR32:$src, (ineg_su GR32:$src)),
1309-
(BLSI32rr_EVEX GR32:$src)>;
1310-
def : Pat<(and_flag_nocf GR64:$src, (ineg_su GR64:$src)),
1311-
(BLSI64rr_EVEX GR64:$src)>;
1312-
}
1284+
let Predicates = [HasBMI, HasEGPR] in
1285+
defm : Bls_patterns<"_EVEX">;
13131286

13141287
multiclass Bmi4VOp3<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node,
13151288
X86FoldableSchedWrite sched, string Suffix = ""> {

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