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[X86] IsNOT - don't fold not(pcmpgt(C1, C2)) -> pcmpgt(C2, C1 - 1)
Interferes with constant folding of the pcmpgt node. Yes another example where topological node sorting would have helped us. Fixes #120906
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5246,7 +5246,8 @@ static SDValue IsNOT(SDValue V, SelectionDAG &DAG) {
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SmallVector<APInt> EltBits;
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if (getTargetConstantBitsFromNode(V.getOperand(0),
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V.getScalarValueSizeInBits(), UndefElts,
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EltBits)) {
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EltBits) &&
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!ISD::isBuildVectorOfConstantSDNodes(V.getOperand(1).getNode())) {
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// Don't fold min_signed_value -> (min_signed_value - 1)
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bool MinSigned = false;
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for (APInt &Elt : EltBits) {

llvm/test/CodeGen/X86/pr120906.ll

Lines changed: 40 additions & 0 deletions
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@@ -0,0 +1,40 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
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define i32 @PR120906(ptr %p) {
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; CHECK-LABEL: PR120906:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl $564341309, (%rdi) # imm = 0x21A32A3D
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; CHECK-NEXT: pxor %xmm0, %xmm0
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: paddb %xmm1, %xmm1
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; CHECK-NEXT: paddb %xmm1, %xmm1
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; CHECK-NEXT: pxor %xmm2, %xmm2
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; CHECK-NEXT: pcmpgtb %xmm1, %xmm2
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [11,11,11,11,u,u,u,u,u,u,u,u,u,u,u,u]
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; CHECK-NEXT: movdqa %xmm1, %xmm3
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; CHECK-NEXT: paddb %xmm1, %xmm3
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; CHECK-NEXT: pand %xmm2, %xmm3
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; CHECK-NEXT: pandn %xmm1, %xmm2
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; CHECK-NEXT: por %xmm1, %xmm2
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; CHECK-NEXT: por %xmm3, %xmm2
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; CHECK-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
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; CHECK-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
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; CHECK-NEXT: por %xmm2, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
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; CHECK-NEXT: por %xmm0, %xmm1
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; CHECK-NEXT: movd %xmm1, %eax
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; CHECK-NEXT: retq
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store i32 564341309, ptr %p, align 4
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%load = load i32, ptr %p, align 4
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%broadcast.splatinsert.1 = insertelement <4 x i32> zeroinitializer, i32 %load, i64 0
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%broadcast.splat.1 = shufflevector <4 x i32> %broadcast.splatinsert.1, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer
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%icmp = icmp ugt <4 x i32> %broadcast.splat.1, splat (i32 -9)
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%zext8 = zext <4 x i1> %icmp to <4 x i8>
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%shl = shl <4 x i8> splat (i8 11), %zext8
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%or = or <4 x i8> %shl, splat (i8 11)
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%zext32 = zext <4 x i8> %or to <4 x i32>
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%rdx = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %zext32)
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ret i32 %rdx
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}

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