[X86][SDAG] llc hang with constant vector splats

[dtcxzyw]

Reproducer: https://godbolt.org/z/PnsfYrfnf

; bin/llc test.ll -o -
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

define i32 @test(ptr %p) {
entry:
  store i32 564341309, ptr %p, align 4
  %0 = load i32, ptr %p, align 4
  %broadcast.splatinsert.1 = insertelement <4 x i32> zeroinitializer, i32 %0, i64 0
  %broadcast.splat.1 = shufflevector <4 x i32> %broadcast.splatinsert.1, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer
  %1 = icmp ugt <4 x i32> %broadcast.splat.1, splat (i32 -9)
  %2 = zext <4 x i1> %1 to <4 x i8>
  %3 = shl <4 x i8> splat (i8 11), %2
  %4 = or <4 x i8> %3, splat (i8 11)
  %bin.rdx = zext <4 x i8> %4 to <4 x i32>
  %5 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %bin.rdx)
  ret i32 %5
}

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Yingwei Zheng (dtcxzyw)

Reproducer: https://godbolt.org/z/PnsfYrfnf ``` ; bin/llc test.ll -o - target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu"

define i32 @test(ptr %p) {
entry:
store i32 564341309, ptr %p, align 4
%0 = load i32, ptr %p, align 4
%broadcast.splatinsert.1 = insertelement <4 x i32> zeroinitializer, i32 %0, i64 0
%broadcast.splat.1 = shufflevector <4 x i32> %broadcast.splatinsert.1, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer
%1 = icmp ugt <4 x i32> %broadcast.splat.1, splat (i32 -9)
%2 = zext <4 x i1> %1 to <4 x i8>
%3 = shl <4 x i8> splat (i8 11), %2
%4 = or <4 x i8> %3, splat (i8 11)
%bin.rdx = zext <4 x i8> %4 to <4 x i32>
%5 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %bin.rdx)
ret i32 %5
}

</details>