[AMDGPU] Incorrect parsing of bf16 literals

[rampitec]

bf16 immediate operands are not handled correctly by asm parser (but seem OK in the codegen):

llvm-mc -arch=amdgcn -mcpu=gfx1200 -show-encoding <<< 'v_dot2_bf16_bf16 v5, v1, v2, 100.0'
v_dot2_bf16_bf16 v5, v1, v2, 0x5640     ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xfe,0x03,0x40,0x56,0x00,0x00]

bf16 constants are essentially fp32 with all zero low 16 bits. So 100.0 shall be encoded as 0x42c80000, and since we only accept 16 bits in the asm hex for it has to be 0x42c8.

llvm-mc -arch=amdgcn -mcpu=gfx1200 -show-encoding <<< 'v_dot2_bf16_bf16 v5, v1, v2, 1.0'
v_dot2_bf16_bf16 v5, v1, v2, 0x3c00     ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xfe,0x03,0x00,0x3c,0x00,0x00]

This shall be inline immediate.

Basically we are parsing bf16 constants as f16.

[llvmbot]

@llvm/issue-subscribers-backend-amdgpu

Author: Stanislav Mekhanoshin (rampitec)

bf16 immediate operands are not handled correctly by asm parser (but seem OK in the codegen): ``` llvm-mc -arch=amdgcn -mcpu=gfx1200 -show-encoding <<< 'v_dot2_bf16_bf16 v5, v1, v2, 100.0' v_dot2_bf16_bf16 v5, v1, v2, 0x5640 ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xfe,0x03,0x40,0x56,0x00,0x00] ``` bf16 constants are essentially fp32 with all zero low 16 bits. So 100.0 shall be encoded as 0x42c80000, and since we only accept 16 bits in the asm hex for it has to be 0x42c8. ``` llvm-mc -arch=amdgcn -mcpu=gfx1200 -show-encoding <<< 'v_dot2_bf16_bf16 v5, v1, v2, 1.0' v_dot2_bf16_bf16 v5, v1, v2, 0x3c00 ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xfe,0x03,0x00,0x3c,0x00,0x00] ``` This shall be inline immediate.

Basically we a parsing bf16 constants as f16.