Implement the dot4add_u8packed HLSL Function

[farzonl]

• Implement dot4add_u8packed clang builtin,
• Link dot4add_u8packed clang builtin with hlsl_intrinsics.h
• Add sema checks for dot4add_u8packed to CheckHLSLBuiltinFunctionCall in SemaChecking.cpp
• Add codegen for dot4add_u8packed to EmitHLSLBuiltinExpr in CGBuiltin.cpp
• Add codegen tests to clang/test/CodeGenHLSL/builtins/dot4add_u8packed.hlsl
• Add sema tests to clang/test/SemaHLSL/BuiltIns/dot4add_u8packed-errors.hlsl
• Create the int_dx_dot4add_u8packed intrinsic in IntrinsicsDirectX.td
• Create the DXILOpMapping of int_dx_dot4add_u8packed to 164 in DXIL.td
• Create the dot4add_u8packed.ll and dot4add_u8packed_errors.ll tests in llvm/test/CodeGen/DirectX/
• Create the int_spv_dot4add_u8packed intrinsic in IntrinsicsSPIRV.td
• In SPIRVInstructionSelector.cpp create the dot4add_u8packed lowering and map it to int_spv_dot4add_u8packed in SPIRVInstructionSelector::selectIntrinsic.
• Create SPIR-V backend test case in llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_u8packed.ll

DirectX

DXIL Opcode	DXIL OpName	Shader Model	Shader Stages
164	Dot4AddU8Packed	6.4	()

SPIR-V

OpUDot:

Description:

Unsigned integer dot product of Vector 1 and Vector 2.

Result Type must be an integer type with Signedness of 0 whose
Width must be greater than or equal to that of the components of
Vector 1 and Vector 2.

Vector 1 and Vector 2 must have the same type.

Vector 1 and Vector 2 must be either 32-bit integers (enabled by the
DotProductInput4x8BitPacked capability) or vectors of
integer type with Signedness of 0 (enabled by the
DotProductInput4x8Bit or DotProductInputAll
capability).

When Vector 1 and Vector 2 are scalar integer types, Packed Vector
Format must be specified to select how the integers are to be
interpreted as vectors.

All components of the input vectors are zero-extended to the bit width
of the result’s type. The zero-extended input vectors are then
multiplied component-wise and all components of the vector resulting
from the component-wise multiplication are added together. The resulting
value will equal the low-order N bits of the correct result R, where N
is the result width and R is computed with enough precision to avoid
overflow and underflow.

Capability:
DotProduct

Missing before version 1.6.

Word Count	Opcode	Results	Operands
5 + variable	4451	<id> Result Type	Result <id>	<id> Vector 1	<id> Vector 2	Optional Packed Vector Format Packed Vector Format

Test Case(s)

Example 1

//dxc dot4add_u8packed_test.hlsl -T lib_6_8 -enable-16bit-types -O0

export uint fn(uint p1, uint p2, uint p3) {
    return dot4add_u8packed(p1, p2, p3);
}

HLSL:

Syntax

uint dot4add_u8packed(uint a, uint b, uint c);

Type Description

Name	Template Type	Component Type	Size
ret	scalar	uint	1
a	scalar	uint	1
b	scalar	uint	1
c	scalar	uint	1

Minimum Shader Model

This function is supported in the following shader models.

Shader Model	Supported
Shader Model 6.4 and higher shader models	yes

Shader Stages

See also

• Intrinsic Functions (DirectX HLSL)
• See Unsigned Integer Dot-Product of 4 Elements and Accumulate

[llvmbot]

@llvm/issue-subscribers-clang-codegen

Author: Farzon Lotfi (farzonl)

- [ ] Implement `dot4add_u8packed` clang builtin, - [ ] Link `dot4add_u8packed` clang builtin with `hlsl_intrinsics.h` - [ ] Add sema checks for `dot4add_u8packed` to `CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp` - [ ] Add codegen for `dot4add_u8packed` to `EmitHLSLBuiltinExpr` in `CGBuiltin.cpp` - [ ] Add codegen tests to `clang/test/CodeGenHLSL/builtins/dot4add_u8packed.hlsl` - [ ] Add sema tests to `clang/test/SemaHLSL/BuiltIns/dot4add_u8packed-errors.hlsl` - [ ] Create the `int_dx_dot4add_u8packed` intrinsic in `IntrinsicsDirectX.td` - [ ] Create the `DXILOpMapping` of `int_dx_dot4add_u8packed` to `164` in `DXIL.td` - [ ] Create the `dot4add_u8packed.ll` and `dot4add_u8packed_errors.ll` tests in `llvm/test/CodeGen/DirectX/` - [ ] Create the `int_spv_dot4add_u8packed` intrinsic in `IntrinsicsSPIRV.td` - [ ] In SPIRVInstructionSelector.cpp create the `dot4add_u8packed` lowering and map it to `int_spv_dot4add_u8packed` in `SPIRVInstructionSelector::selectIntrinsic`. - [ ] Create SPIR-V backend test case in `llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_u8packed.ll`

DirectX

DXIL Opcode	DXIL OpName	Shader Model	Shader Stages
164	Dot4AddU8Packed	6.4	()

SPIR-V

OpUDot:

Description:

Unsigned integer dot product of Vector 1 and Vector 2.

Result Type must be an integer type with Signedness of 0 whose
Width must be greater than or equal to that of the components of
Vector 1 and Vector 2.

Vector 1 and Vector 2 must have the same type.

Vector 1 and Vector 2 must be either 32-bit integers (enabled by the
DotProductInput4x8BitPacked capability) or vectors of
integer type with Signedness of 0 (enabled by the
DotProductInput4x8Bit or DotProductInputAll
capability).

When Vector 1 and Vector 2 are scalar integer types, Packed Vector
Format must be specified to select how the integers are to be
interpreted as vectors.

All components of the input vectors are zero-extended to the bit width
of the result’s type. The zero-extended input vectors are then
multiplied component-wise and all components of the vector resulting
from the component-wise multiplication are added together. The resulting
value will equal the low-order N bits of the correct result R, where N
is the result width and R is computed with enough precision to avoid
overflow and underflow.

Capability:
DotProduct

Missing before version 1.6.

<table style="width:100%;">
<colgroup>
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
</colgroup>
<thead>
<tr>
<th>Word Count</th>
<th>Opcode</th>
<th>Results</th>
<th>Operands</th>
<th></th>
<th></th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td class="tableblock halign-left valign-top"><p>5 + variable</p></td>
<td class="tableblock halign-left valign-top"><p>4451</p></td>
<td
class="tableblock halign-left valign-top"><p><em>&lt;id&gt;</em><br />
<em>Result Type</em></p></td>
<td class="tableblock halign-left valign-top"><p><a
href="#ResultId"><em>Result &lt;id&gt;</em></a></p></td>
<td
class="tableblock halign-left valign-top"><p><em>&lt;id&gt;</em><br />
<em>Vector 1</em></p></td>
<td
class="tableblock halign-left valign-top"><p><em>&lt;id&gt;</em><br />
<em>Vector 2</em></p></td>
<td class="tableblock halign-left valign-top"><p>Optional<br />
<a href="#Packed_Vector_Format"><em>Packed Vector Format</em></a><br />
<em>Packed Vector Format</em></p></td>
</tr>
</tbody>
</table>

Test Case(s)

Example 1

//dxc dot4add_u8packed_test.hlsl -T lib_6_8 -enable-16bit-types -O0

export uint fn(uint p1, uint p2, uint p3) {
    return dot4add_u8packed(p1, p2, p3);
}

HLSL:

Syntax

uint dot4add_u8packed(uint a, uint b, uint c);

Type Description

Name	Template Type	Component Type	Size
ret	scalar	uint	1
a	scalar	uint	1
b	scalar	uint	1
c	scalar	uint	1

Minimum Shader Model

This function is supported in the following shader models.

Shader Model	Supported
Shader Model 6.4 and higher shader models	yes

Shader Stages

See also

• Intrinsic Functions (DirectX HLSL)
• See Unsigned Integer Dot-Product of 4 Elements and Accumulate