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release/19.x: [GlobalISel] Bail out early for big-endian (#103310) #104823

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Aug 20, 2024
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release/19.x: [GlobalISel] Bail out early for big-endian (#103310) #104823

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1 change: 1 addition & 0 deletions llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3889,6 +3889,7 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &CurMF) {
F.getSubprogram(), &F.getEntryBlock());
R << "unable to translate in big endian mode";
reportTranslationError(*MF, *TPC, *ORE, R);
return false;
}

// Release the per-function state when we return, whether we succeeded or not.
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9 changes: 9 additions & 0 deletions llvm/lib/Target/ARM/ARMCallLowering.cpp
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Expand Up @@ -50,6 +50,13 @@

using namespace llvm;

// Whether Big-endian GISel is enabled, defaults to off, can be enabled for
// testing.
static cl::opt<bool>
EnableGISelBigEndian("enable-arm-gisel-bigendian", cl::Hidden,
cl::init(false),
cl::desc("Enable Global-ISel Big Endian Lowering"));

ARMCallLowering::ARMCallLowering(const ARMTargetLowering &TLI)
: CallLowering(&TLI) {}

Expand Down Expand Up @@ -539,3 +546,5 @@ bool ARMCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &

return true;
}

bool ARMCallLowering::enableBigEndian() const { return EnableGISelBigEndian; }
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Missing end of line but I guess that's an upstream patch issue

2 changes: 2 additions & 0 deletions llvm/lib/Target/ARM/ARMCallLowering.h
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Expand Up @@ -42,6 +42,8 @@ class ARMCallLowering : public CallLowering {
bool lowerCall(MachineIRBuilder &MIRBuilder,
CallLoweringInfo &Info) const override;

bool enableBigEndian() const override;

private:
bool lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val,
ArrayRef<Register> VRegs,
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21 changes: 21 additions & 0 deletions llvm/test/CodeGen/AArch64/GlobalISel/endian_fallback.ll
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@@ -0,0 +1,21 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple aarch64-unknown-linux-musl -O0 -global-isel-abort=2 < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LE
; RUN: llc -mtriple aarch64_be-unknown-linux-musl -O0 -global-isel-abort=2 < %s 2>&1 | FileCheck %s --check-prefix=CHECK-BE

; Make sure we fall-back to SDAG for BE targets.

; CHECK-LE-NOT: warning: Instruction selection used fallback path for foo
; CHECK-BE: warning: Instruction selection used fallback path for foo

define <4 x i6> @foo(float %0, <4 x i6> %1) {
; CHECK-LE-LABEL: foo:
; CHECK-LE: // %bb.0:
; CHECK-LE-NEXT: fmov d0, d1
; CHECK-LE-NEXT: ret
;
; CHECK-BE-LABEL: foo:
; CHECK-BE: // %bb.0:
; CHECK-BE-NEXT: fmov d0, d1
; CHECK-BE-NEXT: ret
ret <4 x i6> %1
}
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
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@@ -1,5 +1,5 @@
; RUN: llc -mtriple arm-unknown -mattr=+vfp2,+v4t -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LITTLE
; RUN: llc -mtriple armeb-unknown -mattr=+vfp2,+v4t -global-isel -global-isel-abort=0 -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=BIG
; RUN: llc -mtriple armeb-unknown -mattr=+vfp2,+v4t -global-isel -global-isel-abort=0 -enable-arm-gisel-bigendian -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=BIG

define void @test_void_return() {
; CHECK-LABEL: name: test_void_return
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll
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@@ -1,5 +1,5 @@
; RUN: llc -O0 -mtriple arm-unknown -mattr=+vfp2,+v4t -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=ARM -check-prefix=LITTLE
; RUN: llc -O0 -mtriple armeb-unknown -mattr=+vfp2,+v4t -global-isel -global-isel-abort=0 -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=ARM -check-prefix=BIG
; RUN: llc -O0 -mtriple armeb-unknown -mattr=+vfp2,+v4t -global-isel -global-isel-abort=0 -enable-arm-gisel-bigendian -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=ARM -check-prefix=BIG
; RUN: llc -O0 -mtriple thumb-unknown -mattr=+vfp2,+v6t2 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LITTLE -check-prefix=THUMB

declare arm_aapcscc ptr @simple_reg_params_target(i32, ptr)
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