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[RISCV][ISel] Move VCIX ISDs to correct position. NFC #105934

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Merged
merged 1 commit into from
Aug 25, 2024
Merged

[RISCV][ISel] Move VCIX ISDs to correct position. NFC #105934

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52 changes: 26 additions & 26 deletions llvm/lib/Target/RISCV/RISCVISelLowering.h
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Original file line number Diff line number Diff line change
Expand Up @@ -415,32 +415,6 @@ enum NodeType : unsigned {
/// operand 1 is the target address.
SW_GUARDED_BRIND,

// FP to 32 bit int conversions for RV64. These are used to keep track of the
// result being sign extended to 64 bit. These saturate out of range inputs.
STRICT_FCVT_W_RV64 = ISD::FIRST_TARGET_STRICTFP_OPCODE,
STRICT_FCVT_WU_RV64,
STRICT_FADD_VL,
STRICT_FSUB_VL,
STRICT_FMUL_VL,
STRICT_FDIV_VL,
STRICT_FSQRT_VL,
STRICT_VFMADD_VL,
STRICT_VFNMADD_VL,
STRICT_VFMSUB_VL,
STRICT_VFNMSUB_VL,
STRICT_FP_ROUND_VL,
STRICT_FP_EXTEND_VL,
STRICT_VFNCVT_ROD_VL,
STRICT_SINT_TO_FP_VL,
STRICT_UINT_TO_FP_VL,
STRICT_VFCVT_RM_X_F_VL,
STRICT_VFCVT_RTZ_X_F_VL,
STRICT_VFCVT_RTZ_XU_F_VL,
STRICT_FSETCC_VL,
STRICT_FSETCCS_VL,
STRICT_VFROUND_NOEXCEPT_VL,
LAST_RISCV_STRICTFP_OPCODE = STRICT_VFROUND_NOEXCEPT_VL,

SF_VC_XV_SE,
SF_VC_IV_SE,
SF_VC_VV_SE,
Expand Down Expand Up @@ -468,6 +442,32 @@ enum NodeType : unsigned {
SF_VC_V_VVW_SE,
SF_VC_V_FVW_SE,

// FP to 32 bit int conversions for RV64. These are used to keep track of the
// result being sign extended to 64 bit. These saturate out of range inputs.
STRICT_FCVT_W_RV64 = ISD::FIRST_TARGET_STRICTFP_OPCODE,
STRICT_FCVT_WU_RV64,
STRICT_FADD_VL,
STRICT_FSUB_VL,
STRICT_FMUL_VL,
STRICT_FDIV_VL,
STRICT_FSQRT_VL,
STRICT_VFMADD_VL,
STRICT_VFNMADD_VL,
STRICT_VFMSUB_VL,
STRICT_VFNMSUB_VL,
STRICT_FP_ROUND_VL,
STRICT_FP_EXTEND_VL,
STRICT_VFNCVT_ROD_VL,
STRICT_SINT_TO_FP_VL,
STRICT_UINT_TO_FP_VL,
STRICT_VFCVT_RM_X_F_VL,
STRICT_VFCVT_RTZ_X_F_VL,
STRICT_VFCVT_RTZ_XU_F_VL,
STRICT_FSETCC_VL,
STRICT_FSETCCS_VL,
STRICT_VFROUND_NOEXCEPT_VL,
LAST_RISCV_STRICTFP_OPCODE = STRICT_VFROUND_NOEXCEPT_VL,

// WARNING: Do not add anything in the end unless you want the node to
// have memop! In fact, starting from FIRST_TARGET_MEMORY_OPCODE all
// opcodes will be thought as target memory ops!
Expand Down