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[RISCV] Only disassemble fcvtmod.w.d if the rounding mode is rtz. #111308

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Oct 7, 2024
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10 changes: 10 additions & 0 deletions llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -375,6 +375,16 @@ static DecodeStatus decodeFRMArg(MCInst &Inst, uint32_t Imm, int64_t Address,
return MCDisassembler::Success;
}

static DecodeStatus decodeRTZArg(MCInst &Inst, uint32_t Imm, int64_t Address,
const MCDisassembler *Decoder) {
assert(isUInt<3>(Imm) && "Invalid immediate");
if (Imm != RISCVFPRndMode::RTZ)
return MCDisassembler::Fail;

Inst.addOperand(MCOperand::createImm(Imm));
return MCDisassembler::Success;
}

static DecodeStatus decodeRVCInstrRdRs1ImmZero(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder);
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2 changes: 1 addition & 1 deletion llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ def RTZArg : AsmOperandClass {
def rtzarg : Operand<XLenVT> {
let ParserMatchClass = RTZArg;
let PrintMethod = "printFRMArg";
let DecoderMethod = "decodeFRMArg";
let DecoderMethod = "decodeRTZArg";
}

//===----------------------------------------------------------------------===//
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