[CodeGen][NewPM] Port OptimizePHIs to NPM

llvm/include/llvm/CodeGen/OptimizePHIs.h

@@ -0,0 +1,24 @@
+//===- llvm/CodeGen/OptimizePHIs.h -----------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_OPTIMIZE_PHIS_H
+#define LLVM_CODEGEN_OPTIMIZE_PHIS_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+
+class OptimizePHIsPass : public PassInfoMixin<OptimizePHIsPass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+};
+
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_OPTIMIZE_PHIS_H

llvm/include/llvm/CodeGen/Passes.h

@@ -367,7 +367,7 @@ namespace llvm {
 
   /// OptimizePHIs - This pass optimizes machine instruction PHIs
   /// to take advantage of opportunities created during DAG legalization.
-  extern char &OptimizePHIsID;
+  extern char &OptimizePHIsLegacyID;
 
   /// StackSlotColoring - This pass performs stack slot coloring.
   extern char &StackSlotColoringID;

llvm/include/llvm/InitializePasses.h

@@ -221,7 +221,7 @@ void initializeModuloScheduleTestPass(PassRegistry &);
 void initializeNaryReassociateLegacyPassPass(PassRegistry &);
 void initializeObjCARCContractLegacyPassPass(PassRegistry &);
 void initializeOptimizationRemarkEmitterWrapperPassPass(PassRegistry &);
-void initializeOptimizePHIsPass(PassRegistry &);
+void initializeOptimizePHIsLegacyPass(PassRegistry &);
 void initializePEIPass(PassRegistry &);
 void initializePHIEliminationPass(PassRegistry &);
 void initializePartiallyInlineLibCallsLegacyPassPass(PassRegistry &);

llvm/include/llvm/Passes/CodeGenPassBuilder.h

@@ -49,6 +49,7 @@
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachinePassManager.h"
 #include "llvm/CodeGen/MachineVerifier.h"
+#include "llvm/CodeGen/OptimizePHIs.h"
 #include "llvm/CodeGen/PHIElimination.h"
 #include "llvm/CodeGen/PreISelIntrinsicLowering.h"
 #include "llvm/CodeGen/RegAllocFast.h"

llvm/include/llvm/Passes/MachinePassRegistry.def

@@ -138,6 +138,7 @@ MACHINE_FUNCTION_PASS("localstackalloc", LocalStackSlotAllocationPass())
 MACHINE_FUNCTION_PASS("machine-cse", MachineCSEPass())
 MACHINE_FUNCTION_PASS("machinelicm", MachineLICMPass())
 MACHINE_FUNCTION_PASS("no-op-machine-function", NoOpMachineFunctionPass())
+MACHINE_FUNCTION_PASS("opt-phis", OptimizePHIsPass())
 MACHINE_FUNCTION_PASS("phi-node-elimination", PHIEliminationPass())
 MACHINE_FUNCTION_PASS("print", PrintMIRPass())
 MACHINE_FUNCTION_PASS("print<live-intervals>", LiveIntervalsPrinterPass(dbgs()))
@@ -233,7 +234,6 @@ DUMMY_MACHINE_FUNCTION_PASS("machine-sink", MachineSinkingPass)
 DUMMY_MACHINE_FUNCTION_PASS("machine-uniformity", MachineUniformityInfoWrapperPass)
 DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
 DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
-DUMMY_MACHINE_FUNCTION_PASS("opt-phis", OptimizePHIsPass)
 DUMMY_MACHINE_FUNCTION_PASS("patchable-function", PatchableFunctionPass)
 DUMMY_MACHINE_FUNCTION_PASS("peephole-opt", PeepholeOptimizerPass)
 DUMMY_MACHINE_FUNCTION_PASS("post-RA-sched", PostRASchedulerPass)

llvm/lib/CodeGen/CodeGen.cpp

@@ -99,7 +99,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
   initializeMachineUniformityInfoPrinterPassPass(Registry);
   initializeMachineVerifierLegacyPassPass(Registry);
   initializeObjCARCContractLegacyPassPass(Registry);
-  initializeOptimizePHIsPass(Registry);
+  initializeOptimizePHIsLegacyPass(Registry);
   initializePEIPass(Registry);
   initializePHIEliminationPass(Registry);
   initializePatchableFunctionPass(Registry);

llvm/lib/CodeGen/OptimizePHIs.cpp

@@ -11,15 +11,16 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/CodeGen/OptimizePHIs.h"
 #include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/IR/Function.h"
 #include "llvm/InitializePasses.h"
 #include "llvm/Pass.h"
 #include <cassert>
@@ -33,47 +34,65 @@ STATISTIC(NumDeadPHICycles, "Number of dead PHI cycles");
 
 namespace {
 
-  class OptimizePHIs : public MachineFunctionPass {
-    MachineRegisterInfo *MRI = nullptr;
-    const TargetInstrInfo *TII = nullptr;
+class OptimizePHIs {
+  MachineRegisterInfo *MRI = nullptr;
+  const TargetInstrInfo *TII = nullptr;
 
-  public:
-    static char ID; // Pass identification
+public:
+  bool run(MachineFunction &Fn);
 
-    OptimizePHIs() : MachineFunctionPass(ID) {
-      initializeOptimizePHIsPass(*PassRegistry::getPassRegistry());
-    }
-
-    bool runOnMachineFunction(MachineFunction &Fn) override;
+private:
+  using InstrSet = SmallPtrSet<MachineInstr *, 16>;
+  using InstrSetIterator = SmallPtrSetIterator<MachineInstr *>;
 
-    void getAnalysisUsage(AnalysisUsage &AU) const override {
-      AU.setPreservesCFG();
-      MachineFunctionPass::getAnalysisUsage(AU);
-    }
+  bool IsSingleValuePHICycle(MachineInstr *MI, unsigned &SingleValReg,
+                             InstrSet &PHIsInCycle);
+  bool IsDeadPHICycle(MachineInstr *MI, InstrSet &PHIsInCycle);
+  bool OptimizeBB(MachineBasicBlock &MBB);
+};
 
-  private:
-    using InstrSet = SmallPtrSet<MachineInstr *, 16>;
-    using InstrSetIterator = SmallPtrSetIterator<MachineInstr *>;
+class OptimizePHIsLegacy : public MachineFunctionPass {
+public:
+  static char ID;
+  OptimizePHIsLegacy() : MachineFunctionPass(ID) {
+    initializeOptimizePHIsLegacyPass(*PassRegistry::getPassRegistry());
+  }
 
-    bool IsSingleValuePHICycle(MachineInstr *MI, unsigned &SingleValReg,
-                               InstrSet &PHIsInCycle);
-    bool IsDeadPHICycle(MachineInstr *MI, InstrSet &PHIsInCycle);
-    bool OptimizeBB(MachineBasicBlock &MBB);
-  };
+  bool runOnMachineFunction(MachineFunction &MF) override {
+    if (skipFunction(MF.getFunction()))
+      return false;
+    OptimizePHIs OP;
+    return OP.run(MF);
+  }
 
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
+    AU.setPreservesCFG();
+    MachineFunctionPass::getAnalysisUsage(AU);
+  }
+};
 } // end anonymous namespace
 
-char OptimizePHIs::ID = 0;
+char OptimizePHIsLegacy::ID = 0;
 
-char &llvm::OptimizePHIsID = OptimizePHIs::ID;
+char &llvm::OptimizePHIsLegacyID = OptimizePHIsLegacy::ID;
 
-INITIALIZE_PASS(OptimizePHIs, DEBUG_TYPE,
+INITIALIZE_PASS(OptimizePHIsLegacy, DEBUG_TYPE,
                 "Optimize machine instruction PHIs", false, false)
 
-bool OptimizePHIs::runOnMachineFunction(MachineFunction &Fn) {
-  if (skipFunction(Fn.getFunction()))
-    return false;
+PreservedAnalyses OptimizePHIsPass::run(MachineFunction &MF,
+                                        MachineFunctionAnalysisManager &MFAM) {
+  if (MF.getFunction().hasOptNone())
+    return PreservedAnalyses::all();
+
+  OptimizePHIs OP;
+  if (!OP.run(MF))
+    return PreservedAnalyses::all();
+  auto PA = getMachineFunctionPassPreservedAnalyses();
+  PA.preserveSet<CFGAnalyses>();
+  return PA;
+}
 
+bool OptimizePHIs::run(MachineFunction &Fn) {
   MRI = &Fn.getRegInfo();
   TII = Fn.getSubtarget().getInstrInfo();
 

llvm/lib/CodeGen/TargetPassConfig.cpp

@@ -1283,7 +1283,7 @@ void TargetPassConfig::addMachineSSAOptimization() {
 
   // Optimize PHIs before DCE: removing dead PHI cycles may make more
   // instructions dead.
-  addPass(&OptimizePHIsID);
+  addPass(&OptimizePHIsLegacyID);
 
   // This pass merges large allocas. StackSlotColoring is a different pass
   // which merges spill slots.

llvm/lib/Passes/PassBuilder.cpp

@@ -114,6 +114,7 @@
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/MachineTraceMetrics.h"
 #include "llvm/CodeGen/MachineVerifier.h"
+#include "llvm/CodeGen/OptimizePHIs.h"
 #include "llvm/CodeGen/PHIElimination.h"
 #include "llvm/CodeGen/PreISelIntrinsicLowering.h"
 #include "llvm/CodeGen/RegAllocFast.h"

llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp

@@ -441,7 +441,7 @@ void NVPTXPassConfig::addMachineSSAOptimization() {
 
   // Optimize PHIs before DCE: removing dead PHI cycles may make more
   // instructions dead.
-  addPass(&OptimizePHIsID);
+  addPass(&OptimizePHIsLegacyID);
 
   // This pass merges large allocas. StackSlotColoring is a different pass
   // which merges spill slots.

llvm/test/CodeGen/Thumb/opt-phis.mir

@@ -1,4 +1,5 @@
 # RUN: llc -mtriple thumbv6m-none-eabi -run-pass=opt-phis -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -mtriple thumbv6m-none-eabi -passes=opt-phis -verify-machineinstrs -o - %s | FileCheck %s
 --- |
   target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
   target triple = "thumbv6m-arm-none-eabi"

llvm/test/CodeGen/X86/opt_phis.mir

@@ -1,4 +1,5 @@
 # RUN: llc -run-pass opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
+# RUN: llc -passes opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
 --- |
   define void @test() {
     ret void

llvm/test/CodeGen/X86/opt_phis2.mir

@@ -1,4 +1,5 @@
 # RUN: llc -run-pass opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
+# RUN: llc -passes opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
 # All PHIs should be removed since they can be securely replaced
 # by %8 register.
 # CHECK-NOT: PHI