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4 changes: 1 addition & 3 deletions llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2441,9 +2441,7 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
return true;
}
case Intrinsic::invariant_start: {
LLT PtrTy = getLLTForType(*CI.getArgOperand(0)->getType(), *DL);
Register Undef = MRI->createGenericVirtualRegister(PtrTy);
MIRBuilder.buildUndef(Undef);
MIRBuilder.buildUndef(getOrCreateVReg(CI));
return true;
}
case Intrinsic::invariant_end:
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
Original file line number Diff line number Diff line change
Expand Up @@ -2262,7 +2262,7 @@ declare ptr @llvm.invariant.start.p0(i64, ptr nocapture) readonly nounwind
declare void @llvm.invariant.end.p0(ptr, i64, ptr nocapture) nounwind
define void @test_invariant_intrin() {
; CHECK-LABEL: name: test_invariant_intrin
; CHECK: %{{[0-9]+}}:_(s64) = G_IMPLICIT_DEF
; CHECK: %{{[0-9]+}}:_(p0) = G_IMPLICIT_DEF
; CHECK-NEXT: RET_ReallyLR
%x = alloca %t
%inv = call ptr @llvm.invariant.start.p0(i64 8, ptr %x)
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Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -O0 -global-isel=true --stop-after=irtranslator -o - %s | FileCheck %s

declare ptr @llvm.invariant.start.p5(i64 immarg, ptr addrspace(5) nocapture)
declare void @llvm.invariant.end.p5(ptr, i64 immarg, ptr addrspace(5) nocapture)

define void @use_invariant_promotable_lds(ptr addrspace(5) %arg, i32 %i) {
; CHECK-LABEL: name: use_invariant_promotable_lds
; CHECK: bb.1.bb:
; CHECK-NEXT: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
; CHECK-NEXT: G_STORE [[C]](s32), [[DEF]](p0) :: (store (s32) into %ir.tmp)
; CHECK-NEXT: SI_RETURN
bb:
%tmp = call ptr @llvm.invariant.start.p5(i64 4, ptr addrspace(5) %arg)
call void @llvm.invariant.end.p5(ptr %tmp, i64 4, ptr addrspace(5) %arg)
store i32 0, ptr %tmp, align 4
ret void
}