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[WIP][X86] combineX86ShufflesRecursively - attempt to combine shuffles with larger types from EXTRACT_SUBVECTOR nodes #133947

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[WIP][X86] combineX86ShufflesRecursively - attempt to combine shuffles with larger types from EXTRACT_SUBVECTOR nodes #133947

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3 changes: 2 additions & 1 deletion llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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Expand Up @@ -5109,7 +5109,8 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
case ISD::TRUNCATE: {
// Check if the sign bits of source go down as far as the truncated value.
unsigned NumSrcBits = Op.getOperand(0).getScalarValueSizeInBits();
unsigned NumSrcSignBits = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
unsigned NumSrcSignBits =
ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth + 1);
if (NumSrcSignBits > (NumSrcBits - VTBits))
return NumSrcSignBits - (NumSrcBits - VTBits);
break;
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311 changes: 88 additions & 223 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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432 changes: 179 additions & 253 deletions llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
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60 changes: 22 additions & 38 deletions llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
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Expand Up @@ -641,25 +641,16 @@ define void @vec128_i16_widen_to_i32_factor2_broadcast_to_v4i32_factor4(ptr %in.
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512BW-SLOW-LABEL: vec128_i16_widen_to_i32_factor2_broadcast_to_v4i32_factor4:
; AVX512BW-SLOW: # %bb.0:
; AVX512BW-SLOW-NEXT: vpmovsxbw {{.*#+}} xmm0 = [0,9,0,11,0,13,0,15]
; AVX512BW-SLOW-NEXT: vpermw (%rdi), %ymm0, %ymm0
; AVX512BW-SLOW-NEXT: vpaddb (%rsi), %zmm0, %zmm0
; AVX512BW-SLOW-NEXT: vmovdqa64 %zmm0, (%rdx)
; AVX512BW-SLOW-NEXT: vzeroupper
; AVX512BW-SLOW-NEXT: retq
;
; AVX512BW-FAST-LABEL: vec128_i16_widen_to_i32_factor2_broadcast_to_v4i32_factor4:
; AVX512BW-FAST: # %bb.0:
; AVX512BW-FAST-NEXT: vpmovsxbw {{.*#+}} xmm0 = [0,9,0,11,0,13,6,7]
; AVX512BW-FAST-NEXT: vpermw (%rdi), %ymm0, %ymm0
; AVX512BW-FAST-NEXT: vpinsrw $6, (%rdi), %xmm0, %xmm0
; AVX512BW-FAST-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5,6],mem[7]
; AVX512BW-FAST-NEXT: vpaddb (%rsi), %zmm0, %zmm0
; AVX512BW-FAST-NEXT: vmovdqa64 %zmm0, (%rdx)
; AVX512BW-FAST-NEXT: vzeroupper
; AVX512BW-FAST-NEXT: retq
; AVX512BW-LABEL: vec128_i16_widen_to_i32_factor2_broadcast_to_v4i32_factor4:
; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} xmm0 = [16,25,16,27,16,29,0,23]
; AVX512BW-NEXT: vmovdqa (%rdi), %xmm1
; AVX512BW-NEXT: vpermt2w (%rdi), %ymm0, %ymm1
; AVX512BW-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5,6],mem[7]
; AVX512BW-NEXT: vpaddb (%rsi), %zmm0, %zmm0
; AVX512BW-NEXT: vmovdqa64 %zmm0, (%rdx)
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
%in.vec = load <64 x i8>, ptr %in.elt.ptr, align 64
%in.vec.cast = bitcast <64 x i8> %in.vec to <32 x i16>
%broadcast.of.zextinreg = shufflevector <32 x i16> %in.vec.cast, <32 x i16> poison, <8 x i32> <i32 0, i32 9, i32 0, i32 11, i32 0, i32 13, i32 0, i32 15>
Expand Down Expand Up @@ -735,25 +726,18 @@ define void @vec128_i16_widen_to_i64_factor4_broadcast_to_v2i64_factor2(ptr %in.
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512BW-SLOW-LABEL: vec128_i16_widen_to_i64_factor4_broadcast_to_v2i64_factor2:
; AVX512BW-SLOW: # %bb.0:
; AVX512BW-SLOW-NEXT: vpmovsxbw {{.*#+}} xmm0 = [0,9,10,11,0,13,6,7]
; AVX512BW-SLOW-NEXT: vpermw (%rdi), %ymm0, %ymm0
; AVX512BW-SLOW-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1,2],mem[3]
; AVX512BW-SLOW-NEXT: vpaddb (%rsi), %zmm0, %zmm0
; AVX512BW-SLOW-NEXT: vmovdqa64 %zmm0, (%rdx)
; AVX512BW-SLOW-NEXT: vzeroupper
; AVX512BW-SLOW-NEXT: retq
;
; AVX512BW-FAST-LABEL: vec128_i16_widen_to_i64_factor4_broadcast_to_v2i64_factor2:
; AVX512BW-FAST: # %bb.0:
; AVX512BW-FAST-NEXT: vpmovsxbw {{.*#+}} xmm0 = [0,9,10,11,0,5,6,7]
; AVX512BW-FAST-NEXT: vpermw (%rdi), %ymm0, %ymm0
; AVX512BW-FAST-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4],mem[5,6,7]
; AVX512BW-FAST-NEXT: vpaddb (%rsi), %zmm0, %zmm0
; AVX512BW-FAST-NEXT: vmovdqa64 %zmm0, (%rdx)
; AVX512BW-FAST-NEXT: vzeroupper
; AVX512BW-FAST-NEXT: retq
; AVX512BW-LABEL: vec128_i16_widen_to_i64_factor4_broadcast_to_v2i64_factor2:
; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
; AVX512BW-NEXT: vmovdqa 16(%rdi), %xmm1
; AVX512BW-NEXT: vmovd %xmm0, %eax
; AVX512BW-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3],xmm0[4,5,6,7]
; AVX512BW-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0
; AVX512BW-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4],xmm1[5,6,7]
; AVX512BW-NEXT: vpaddb (%rsi), %zmm0, %zmm0
; AVX512BW-NEXT: vmovdqa64 %zmm0, (%rdx)
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
%in.vec = load <64 x i8>, ptr %in.elt.ptr, align 64
%in.vec.cast = bitcast <64 x i8> %in.vec to <32 x i16>
%broadcast.of.zextinreg = shufflevector <32 x i16> %in.vec.cast, <32 x i16> poison, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 0, i32 13, i32 14, i32 15>
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8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/avx512-cvt.ll
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Expand Up @@ -179,11 +179,11 @@ define <4 x i64> @f64to4sl(<4 x double> %a) {
; NODQ: # %bb.0:
; NODQ-NEXT: vextractf128 $1, %ymm0, %xmm1
; NODQ-NEXT: vcvttsd2si %xmm1, %rax
; NODQ-NEXT: vmovq %rax, %xmm2
; NODQ-NEXT: vshufpd {{.*#+}} xmm1 = xmm1[1,0]
; NODQ-NEXT: vcvttsd2si %xmm1, %rax
; NODQ-NEXT: vmovq %rax, %xmm1
; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; NODQ-NEXT: vpermpd {{.*#+}} ymm2 = ymm0[3,2,2,3]
; NODQ-NEXT: vcvttsd2si %xmm2, %rax
; NODQ-NEXT: vmovq %rax, %xmm2
; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
; NODQ-NEXT: vcvttsd2si %xmm0, %rax
; NODQ-NEXT: vmovq %rax, %xmm2
; NODQ-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]
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7 changes: 4 additions & 3 deletions llvm/test/CodeGen/X86/avx512-hadd-hsub.ll
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Expand Up @@ -221,9 +221,10 @@ define double @fsub_noundef_ee (<8 x double> %x225, <8 x double> %x227) {
;
; SKX-LABEL: fsub_noundef_ee:
; SKX: # %bb.0:
; SKX-NEXT: vextractf32x4 $2, %zmm1, %xmm0
; SKX-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
; SKX-NEXT: vsubsd %xmm1, %xmm0, %xmm0
; SKX-NEXT: vmovapd {{.*#+}} xmm0 = [5,4]
; SKX-NEXT: vpermpd %zmm1, %zmm0, %zmm0
; SKX-NEXT: vextractf32x4 $2, %zmm1, %xmm1
; SKX-NEXT: vsubsd %xmm0, %xmm1, %xmm0
; SKX-NEXT: vzeroupper
; SKX-NEXT: retq
%x226 = shufflevector <8 x double> %x225, <8 x double> %x227, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
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