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[ConstraintElim] Optimize usub.sat intrinsic based on known constraints #135744

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[ConstraintElim] Optimize usub.sat intrinsic based on known constraints #135744

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fc2a35c
[ConstraintElim] Optimize usub.sat intrinsic based on known constraints
el-ev Apr 15, 2025
ace4e18
pre-commit test
el-ev Apr 15, 2025
dbe385b
update test
el-ev Apr 15, 2025
8071ab2
bypass poison check for usub.sat
el-ev Apr 15, 2025
5624d79
update test
el-ev Apr 15, 2025
9b486eb
add nopoison back
el-ev Apr 15, 2025
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29 changes: 26 additions & 3 deletions llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1132,17 +1132,17 @@ void State::addInfoFor(BasicBlock &BB) {
case Intrinsic::umax:
case Intrinsic::smin:
case Intrinsic::smax:
case Intrinsic::usub_sat:
// TODO: handle llvm.abs as well
WorkList.push_back(
FactOrCheck::getCheck(DT.getNode(&BB), cast<CallInst>(&I)));
// TODO: Check if it is possible to instead only added the min/max facts
// when simplifying uses of the min/max intrinsics.
if (!isGuaranteedNotToBePoison(&I))
break;
[[fallthrough]];
case Intrinsic::abs:
case Intrinsic::uadd_sat:
case Intrinsic::usub_sat:
if (!isGuaranteedNotToBePoison(&I))
break;
WorkList.push_back(FactOrCheck::getInstFact(DT.getNode(&BB), &I));
break;
}
Expand Down Expand Up @@ -1519,6 +1519,24 @@ static bool checkAndReplaceCmp(CmpIntrinsic *I, ConstraintInfo &Info,
return false;
}

static bool checkAndReplaceUSubSat(SaturatingInst *I, ConstraintInfo &Info,
SmallVectorImpl<Instruction *> &ToRemove) {
Value *LHS = I->getOperand(0);
Value *RHS = I->getOperand(1);
if (checkCondition(ICmpInst::ICMP_UGT, LHS, RHS, I, Info).value_or(false)) {
IRBuilder<> Builder(I->getParent(), I->getIterator());
I->replaceAllUsesWith(Builder.CreateSub(LHS, RHS));
ToRemove.push_back(I);
return true;
}
if (checkCondition(ICmpInst::ICMP_ULE, LHS, RHS, I, Info).value_or(false)) {
I->replaceAllUsesWith(ConstantInt::get(I->getType(), 0));
ToRemove.push_back(I);
return true;
}
return false;
}

static void
removeEntryFromStack(const StackEntry &E, ConstraintInfo &Info,
Module *ReproducerModule,
Expand Down Expand Up @@ -1840,6 +1858,11 @@ static bool eliminateConstraints(Function &F, DominatorTree &DT, LoopInfo &LI,
Changed |= checkAndReplaceMinMax(MinMax, Info, ToRemove);
} else if (auto *CmpIntr = dyn_cast<CmpIntrinsic>(Inst)) {
Changed |= checkAndReplaceCmp(CmpIntr, Info, ToRemove);
} else if (auto *SatIntr = dyn_cast<SaturatingInst>(Inst)) {
if (SatIntr->getIntrinsicID() == Intrinsic::usub_sat)
Changed |= checkAndReplaceUSubSat(SatIntr, Info, ToRemove);
else
llvm_unreachable("Unexpected intrinsic.");
}
continue;
}
Expand Down
24 changes: 16 additions & 8 deletions llvm/test/Transforms/ConstraintElimination/abs.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,8 @@ define i1 @abs_int_min_is_not_poison(i32 %arg) {
; CHECK-LABEL: define i1 @abs_int_min_is_not_poison(
; CHECK-SAME: i32 [[ARG:%.*]]) {
; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
; CHECK-NEXT: ret i1 true
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[ABS]], [[ARG]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false)
%cmp = icmp sge i32 %abs, %arg
Expand All @@ -16,7 +17,8 @@ define i1 @abs_int_min_is_poison(i32 %arg) {
; CHECK-LABEL: define i1 @abs_int_min_is_poison(
; CHECK-SAME: i32 [[ARG:%.*]]) {
; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
; CHECK-NEXT: ret i1 true
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[ABS]], [[ARG]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
%cmp = icmp sge i32 %abs, %arg
Expand All @@ -28,7 +30,8 @@ define i1 @abs_plus_one(i32 %arg) {
; CHECK-SAME: i32 [[ARG:%.*]]) {
; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
; CHECK-NEXT: [[ABS_PLUS_ONE:%.*]] = add nsw i32 [[ABS]], 1
; CHECK-NEXT: ret i1 true
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[ABS_PLUS_ONE]], [[ARG]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
%abs_plus_one = add nsw i32 %abs, 1
Expand All @@ -41,7 +44,8 @@ define i1 @arg_minus_one_strict_less(i32 %arg) {
; CHECK-SAME: i32 [[ARG:%.*]]) {
; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
; CHECK-NEXT: [[ARG_MINUS_ONE:%.*]] = add nsw i32 [[ARG]], -1
; CHECK-NEXT: ret i1 true
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ARG_MINUS_ONE]], [[ABS]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
%arg_minus_one = add nsw i32 %arg, -1
Expand All @@ -54,7 +58,8 @@ define i1 @arg_minus_one_strict_greater(i32 %arg) {
; CHECK-SAME: i32 [[ARG:%.*]]) {
; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
; CHECK-NEXT: [[ARG_MINUS_ONE:%.*]] = add nsw i32 [[ARG]], -1
; CHECK-NEXT: ret i1 false
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[ARG_MINUS_ONE]], [[ABS]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
%arg_minus_one = add nsw i32 %arg, -1
Expand All @@ -69,7 +74,8 @@ define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg(i32 %arg) {
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_ARG_NONNEGATIVE]])
; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
; CHECK-NEXT: [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ABS]], 1
; CHECK-NEXT: ret i1 true
; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[ABS_PLUS_ONE]], [[ARG]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%cmp_arg_nonnegative = icmp sge i32 %arg, 0
call void @llvm.assume(i1 %cmp_arg_nonnegative)
Expand Down Expand Up @@ -142,7 +148,8 @@ define i1 @abs_is_nonnegative_int_min_is_poison(i32 %arg) {
; CHECK-LABEL: define i1 @abs_is_nonnegative_int_min_is_poison(
; CHECK-SAME: i32 [[ARG:%.*]]) {
; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
; CHECK-NEXT: ret i1 true
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[ABS]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
%cmp = icmp sge i32 %abs, 0
Expand All @@ -152,7 +159,8 @@ define i1 @abs_is_nonnegative_int_min_is_poison(i32 %arg) {
define i1 @abs_is_nonnegative_constant_arg() {
; CHECK-LABEL: define i1 @abs_is_nonnegative_constant_arg() {
; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 -3, i1 true)
; CHECK-NEXT: ret i1 true
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[ABS]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%abs = tail call i32 @llvm.abs.i32(i32 -3, i1 true)
%cmp = icmp sge i32 %abs, 0
Expand Down
44 changes: 42 additions & 2 deletions llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,9 @@ define i1 @uadd_sat_uge(i64 %a, i64 %b) {
; CHECK-LABEL: define i1 @uadd_sat_uge(
; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
; CHECK-NEXT: [[ADD_SAT:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: [[CMP:%.*]] = and i1 true, true
; CHECK-NEXT: [[CMP1:%.*]] = icmp uge i64 [[ADD_SAT]], [[A]]
; CHECK-NEXT: [[CMP2:%.*]] = icmp uge i64 [[ADD_SAT]], [[B]]
; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP1]], [[CMP2]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%add.sat = call i64 @llvm.uadd.sat.i64(i64 %a, i64 %b)
Expand All @@ -22,13 +24,41 @@ define i1 @usub_sat_ule_lhs(i64 %a, i64 %b) {
; CHECK-LABEL: define i1 @usub_sat_ule_lhs(
; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
; CHECK-NEXT: [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: ret i1 true
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i64 [[SUB_SAT]], [[A]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%sub.sat = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
%cmp = icmp ule i64 %sub.sat, %a
ret i1 %cmp
}

define i64 @usub_sat_when_lhs_ugt_rhs(i64 %a, i64 %b) {
; CHECK-LABEL: define i64 @usub_sat_when_lhs_ugt_rhs(
; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
; CHECK-NEXT: [[PRECOND:%.*]] = icmp ugt i64 [[A]], [[B]]
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
; CHECK-NEXT: [[SUB_SAT:%.*]] = sub i64 [[A]], [[B]]
; CHECK-NEXT: ret i64 [[SUB_SAT]]
;
%precond = icmp ugt i64 %a, %b
call void @llvm.assume(i1 %precond)
%sub.sat = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
ret i64 %sub.sat
}

define i64 @usub_sat_when_lhs_ule_rhs(i64 %a, i64 %b) {
; CHECK-LABEL: define i64 @usub_sat_when_lhs_ule_rhs(
; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
; CHECK-NEXT: [[PRECOND:%.*]] = icmp ule i64 [[A]], [[B]]
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
; CHECK-NEXT: ret i64 0
;
%precond = icmp ule i64 %a, %b
call void @llvm.assume(i1 %precond)
%sub.sat = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
ret i64 %sub.sat
}

; Negative test
define i1 @usub_sat_not_ule_rhs(i64 %a, i64 %b) {
; CHECK-LABEL: define i1 @usub_sat_not_ule_rhs(
Expand All @@ -41,3 +71,13 @@ define i1 @usub_sat_not_ule_rhs(i64 %a, i64 %b) {
%cmp = icmp ule i64 %sub.sat, %b
ret i1 %cmp
}

define i64 @usub_sat_without_precond(i64 %a, i64 %b) {
; CHECK-LABEL: define i64 @usub_sat_without_precond(
; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
; CHECK-NEXT: [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: ret i64 [[SUB_SAT]]
;
%sub.sat = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
ret i64 %sub.sat
}
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