[LivePhysRegs] Make use of MBB.liveouts() (semi-NFC)
#154728
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This is done for consistency with LiveRegUnits (see llvm#154325). This is technically not an NFC, as `MBB.liveouts()` excludes runtime-defined liveins, but no users currently depend on this.
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@llvm/pr-subscribers-llvm-regalloc Author: Benjamin Maxwell (MacDue) ChangesThis is done for consistency with LiveRegUnits (see #154325). This is technically not an NFC, as Full diff: https://github.com/llvm/llvm-project/pull/154728.diff 3 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/LivePhysRegs.h b/llvm/include/llvm/CodeGen/LivePhysRegs.h
index 2a719571fde2d..4af5b00014cb7 100644
--- a/llvm/include/llvm/CodeGen/LivePhysRegs.h
+++ b/llvm/include/llvm/CodeGen/LivePhysRegs.h
@@ -165,10 +165,17 @@ class LivePhysRegs {
void dump() const;
private:
+ /// Adds a register, taking the lane mask into consideration.
+ void addRegMaskPair(const MachineBasicBlock::RegisterMaskPair &Pair);
+
/// Adds live-in registers from basic block \p MBB, taking associated
/// lane masks into consideration.
void addBlockLiveIns(const MachineBasicBlock &MBB);
+ /// Adds live-out registers from basic block \p MBB, taking associated
+ /// lane masks into consideration.
+ void addBlockLiveOuts(const MachineBasicBlock &MBB);
+
/// Adds pristine registers. Pristine registers are callee saved registers
/// that are unused in the function.
void addPristines(const MachineFunction &MF);
diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp
index bc711382420be..f1d31daaea530 100644
--- a/llvm/lib/CodeGen/LivePhysRegs.cpp
+++ b/llvm/lib/CodeGen/LivePhysRegs.cpp
@@ -151,23 +151,34 @@ bool LivePhysRegs::available(const MachineRegisterInfo &MRI,
return true;
}
+/// Adds a register, taking associated lane masks into consideration.
+void LivePhysRegs::addRegMaskPair(
+ const MachineBasicBlock::RegisterMaskPair &Pair) {
+ MCRegister Reg = Pair.PhysReg;
+ LaneBitmask Mask = Pair.LaneMask;
+ MCSubRegIndexIterator S(Reg, TRI);
+ assert(Mask.any() && "Invalid livein mask");
+ if (Mask.all() || !S.isValid()) {
+ addReg(Reg);
+ return;
+ }
+ for (; S.isValid(); ++S) {
+ unsigned SI = S.getSubRegIndex();
+ if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())
+ addReg(S.getSubReg());
+ }
+}
+
/// Add live-in registers of basic block \p MBB to \p LiveRegs.
void LivePhysRegs::addBlockLiveIns(const MachineBasicBlock &MBB) {
- for (const auto &LI : MBB.liveins()) {
- MCRegister Reg = LI.PhysReg;
- LaneBitmask Mask = LI.LaneMask;
- MCSubRegIndexIterator S(Reg, TRI);
- assert(Mask.any() && "Invalid livein mask");
- if (Mask.all() || !S.isValid()) {
- addReg(Reg);
- continue;
- }
- for (; S.isValid(); ++S) {
- unsigned SI = S.getSubRegIndex();
- if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())
- addReg(S.getSubReg());
- }
- }
+ for (const auto &LI : MBB.liveins())
+ addRegMaskPair(LI);
+}
+
+/// Add live-out registers of basic block \p MBB to \p LiveRegs.
+void LivePhysRegs::addBlockLiveOuts(const MachineBasicBlock &MBB) {
+ for (const auto &LO : MBB.liveouts())
+ addRegMaskPair(LO);
}
/// Adds all callee saved registers to \p LiveRegs.
@@ -207,9 +218,7 @@ void LivePhysRegs::addPristines(const MachineFunction &MF) {
}
void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock &MBB) {
- // To get the live-outs we simply merge the live-ins of all successors.
- for (const MachineBasicBlock *Succ : MBB.successors())
- addBlockLiveIns(*Succ);
+ addBlockLiveOuts(MBB);
if (MBB.isReturnBlock()) {
// Return blocks are a special case because we currently don't mark up
// return instructions completely: specifically, there is no explicit
@@ -356,8 +365,8 @@ bool llvm::isPhysRegUsedAfter(Register Reg, MachineBasicBlock::iterator MBI) {
// If we hit the end of the block, check whether Reg is live into a
// successor.
- for (MachineBasicBlock *Succ : MBB->successors())
- if (Succ->isLiveIn(Reg))
+ for (const auto &LO : MBB->liveouts())
+ if (LO.PhysReg == MCRegister(Reg) && LO.LaneMask.any())
return true;
return false;
diff --git a/llvm/lib/CodeGen/LiveRegUnits.cpp b/llvm/lib/CodeGen/LiveRegUnits.cpp
index d9c56b87a6bf4..0d87062169585 100644
--- a/llvm/lib/CodeGen/LiveRegUnits.cpp
+++ b/llvm/lib/CodeGen/LiveRegUnits.cpp
@@ -94,8 +94,8 @@ static void addBlockLiveIns(LiveRegUnits &LiveUnits,
/// Add live-out registers of basic block \p MBB to \p LiveUnits.
static void addBlockLiveOuts(LiveRegUnits &LiveUnits,
const MachineBasicBlock &MBB) {
- for (const auto &LI : MBB.liveouts())
- LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
+ for (const auto &LO : MBB.liveouts())
+ LiveUnits.addRegMasked(LO.PhysReg, LO.LaneMask);
}
/// Adds all callee saved registers to \p LiveUnits.
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arsenm
approved these changes
Aug 21, 2025
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/2/builds/32040 Here is the relevant piece of the build log for the reference |
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The following buildbots are also broken after this patch https://lab.llvm.org/buildbot/#/builders/197/builds/8321 Please take a look and fix ASAP. |
Will do 👍 It looks like MSVC does not like the cast to |
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Possible fix in: #155084 |
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Why did you disable auto-merge and merged over the failed build? |
I think I misinterpreted in the Windows error as being " '#' is not recognized as an internal or external command,", which seemed like some random CI flake, my bad. I find that since we've switched over from buildkite it's much harder to see what the error is in the CI logs. |
Still failed. LivePhysRegs.cpp(369): error C2440: '': cannot convert from 'llvm::Register' to 'llvm::MCRegister' |
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That error seems to be from before #155084 was applied (as that patch removed the "<function-style-cast>"). |
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You are right. This problem has been fixed. Sorry to bother you. |
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This is done for consistency with LiveRegUnits (see #154325). This is technically not an NFC, as
MBB.liveouts()excludes runtime-defined liveins, but no users currently depend on this.