[NVPTX] Improve lowering of v2i16 logical ops. #67365
Merged
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Bitwise logical ops can always be done as b32, regardless of availability of other v2i16 ops, that would need a new GPU.
Previously we only matched i32 arguments, and were lucky that that's what we were often getting when an argument was loaded from memory. For computed arguments, we do need to match v2i16.
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Bitwise logical ops can always be done as b32, regardless of availability of
other v2i16 ops, that would need a new GPU.
Includes the missing lowering for 2-argument register operation variants and additional tests for
and.