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[AMDGPU][AsmParser] Eliminate custom predicates for named-bit operands. #69243
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kosarev
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kosarev:eliminate_custom_named_bit_predicates
Oct 17, 2023
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[AMDGPU][AsmParser] Eliminate custom predicates for named-bit operands. #69243
kosarev
merged 1 commit into
llvm:main
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kosarev:eliminate_custom_named_bit_predicates
Oct 17, 2023
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@llvm/pr-subscribers-backend-amdgpu Author: Ivan Kosarev (kosarev) ChangesisGDS() and isTFE() need special treatment, because they may be both named-bit and token operands. Part of #62629. Full diff: https://github.com/llvm/llvm-project/pull/69243.diff 3 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
index 81fc28d293021ab..23242ad84b0c425 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
@@ -125,11 +125,11 @@ def InstFlag : OperandWithDefaultOps <i32, (ops (i32 0))>;
def i1imm_0 : OperandWithDefaultOps<i1, (ops (i1 0))>;
-class CustomOperandClass<string name, bit optional, string parserMethod,
- string defaultMethod>
+class CustomOperandClass<string name, bit optional, string predicateMethod,
+ string parserMethod, string defaultMethod>
: AsmOperandClass {
let Name = name;
- let PredicateMethod = "is"#name;
+ let PredicateMethod = predicateMethod;
let ParserMethod = parserMethod;
let RenderMethod = "addImmOperands";
let IsOptional = optional;
@@ -138,6 +138,7 @@ class CustomOperandClass<string name, bit optional, string parserMethod,
class CustomOperandProps<bit optional = 0, string name = NAME> {
string ImmTy = "ImmTy"#name;
+ string PredicateMethod = "is"#name;
string ParserMethod = "parse"#name;
string DefaultValue = "0";
string DefaultMethod = "[this]() { return "#
@@ -145,7 +146,8 @@ class CustomOperandProps<bit optional = 0, string name = NAME> {
"AMDGPUOperand::"#ImmTy#"); }";
string PrintMethod = "print"#name;
AsmOperandClass ParserMatchClass =
- CustomOperandClass<name, optional, ParserMethod, DefaultMethod>;
+ CustomOperandClass<name, optional, PredicateMethod, ParserMethod,
+ DefaultMethod>;
string OperandType = "OPERAND_IMMEDIATE";
}
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index fa651b9fcb05a5b..faeaa94f9733576 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -356,25 +356,20 @@ class AMDGPUOperand : public MCParsedAsmOperand {
return isImm() && Imm.Type == ImmT;
}
+ template <ImmTy Ty> bool isImmTy() const { return isImmTy(Ty); }
+
bool isImmLiteral() const { return isImmTy(ImmTyNone); }
bool isImmModifier() const {
return isImm() && Imm.Type != ImmTyNone;
}
- bool isClampSI() const { return isImmTy(ImmTyClampSI); }
bool isOModSI() const { return isImmTy(ImmTyOModSI); }
bool isDMask() const { return isImmTy(ImmTyDMask); }
bool isDim() const { return isImmTy(ImmTyDim); }
- bool isUNorm() const { return isImmTy(ImmTyUNorm); }
- bool isDA() const { return isImmTy(ImmTyDA); }
bool isR128A16() const { return isImmTy(ImmTyR128A16); }
- bool isA16() const { return isImmTy(ImmTyA16); }
- bool isLWE() const { return isImmTy(ImmTyLWE); }
bool isOff() const { return isImmTy(ImmTyOff); }
bool isExpTgt() const { return isImmTy(ImmTyExpTgt); }
- bool isExpVM() const { return isImmTy(ImmTyExpVM); }
- bool isExpCompr() const { return isImmTy(ImmTyExpCompr); }
bool isOffen() const { return isImmTy(ImmTyOffen); }
bool isIdxen() const { return isImmTy(ImmTyIdxen); }
bool isAddr64() const { return isImmTy(ImmTyAddr64); }
@@ -387,7 +382,6 @@ class AMDGPUOperand : public MCParsedAsmOperand {
bool isLDS() const { return isImmTy(ImmTyLDS); }
bool isCPol() const { return isImmTy(ImmTyCPol); }
bool isTFE() const { return isImmTy(ImmTyTFE); }
- bool isD16() const { return isImmTy(ImmTyD16); }
bool isFORMAT() const { return isImmTy(ImmTyFORMAT) && isUInt<7>(getImm()); }
bool isDppBankMask() const { return isImmTy(ImmTyDppBankMask); }
bool isDppRowMask() const { return isImmTy(ImmTyDppRowMask); }
@@ -404,7 +398,6 @@ class AMDGPUOperand : public MCParsedAsmOperand {
bool isOpSelHi() const { return isImmTy(ImmTyOpSelHi); }
bool isNegLo() const { return isImmTy(ImmTyNegLo); }
bool isNegHi() const { return isImmTy(ImmTyNegHi); }
- bool isHigh() const { return isImmTy(ImmTyHigh); }
bool isRegOrImm() const {
return isReg() || isImm();
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index f09ca954904fc62..b4adb444600c478 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -1045,6 +1045,7 @@ class NamedIntOperand<ValueType Type, string Prefix, string Name = NAME,
class NamedBitOperand<string Id, string Name = NAME>
: CustomOperand<i1, 1, Name> {
+ let PredicateMethod = "isImmTy<AMDGPUOperand::"#ImmTy#">";
let ParserMethod =
"[this](OperandVector &Operands) -> ParseStatus { "#
"return parseNamedBit(\""#Id#"\", Operands, AMDGPUOperand::"#ImmTy#"); }";
@@ -1056,6 +1057,7 @@ class NamedBitOperand<string Id, string Name = NAME>
class DefaultOperand<CustomOperand Op, int Value>
: OperandWithDefaultOps<Op.Type, (ops (Op.Type Value))>,
CustomOperandProps<1, Op.ParserMatchClass.Name> {
+ let PredicateMethod = Op.ParserMatchClass.PredicateMethod;
let ParserMethod = Op.ParserMatchClass.ParserMethod;
let PrintMethod = Op.PrintMethod;
}
|
rampitec
approved these changes
Oct 16, 2023
isGDS() and isTFE() need special treatment, because they may be both named-bit and token operands. Part of llvm#62629.
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isGDS() and isTFE() need special treatment, because they may be both named-bit and token operands.
Part of #62629.