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[X86] Support EVEX compression for EGPR #77202

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Merged
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Jan 8, 2024
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[X86] Support EVEX compression for EGPR #77202

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8 changes: 6 additions & 2 deletions llvm/lib/Target/X86/X86CompressEVEX.cpp
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Expand Up @@ -252,8 +252,12 @@ static bool CompressEVEXImpl(MachineInstr &MI, const X86Subtarget &ST) {
if (!performCustomAdjustments(MI, I->NewOpc))
return false;

MI.setDesc(ST.getInstrInfo()->get(I->NewOpc));
MI.setAsmPrinterFlag(X86::AC_EVEX_2_VEX);
const MCInstrDesc &NewDesc = ST.getInstrInfo()->get(I->NewOpc);
MI.setDesc(NewDesc);
uint64_t Encoding = NewDesc.TSFlags & X86II::EncodingMask;
auto AsmComment =
(Encoding == X86II::VEX) ? X86::AC_EVEX_2_VEX : X86::AC_EVEX_2_LEGACY;
MI.setAsmPrinterFlag(AsmComment);
return true;
}

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4 changes: 3 additions & 1 deletion llvm/lib/Target/X86/X86InstrInfo.h
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Expand Up @@ -29,8 +29,10 @@ class X86Subtarget;
namespace X86 {

enum AsmComments {
// For instr that was compressed from EVEX to LEGACY.
AC_EVEX_2_LEGACY = MachineInstr::TAsmComments,
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Why we need to associate with this value? Will it be a problem if there's new Flag added after MachineInstr::TAsmComments?

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  enum CommentFlag {
    ReloadReuse = 0x1,    // higher bits are reserved for target dep comments.
    NoSchedComment = 0x2,
    TAsmComments = 0x4    // Target Asm comments should start from this value.
  };

It's documented at llvm/include/llvm/CodeGen/MachineInstr.h. T is short for target and TAsmComments should always be the last value here.

// For instr that was compressed from EVEX to VEX.
AC_EVEX_2_VEX = MachineInstr::TAsmComments
AC_EVEX_2_VEX = AC_EVEX_2_LEGACY << 1
};

/// Return a pair of condition code for the given predicate and whether
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7 changes: 4 additions & 3 deletions llvm/lib/Target/X86/X86MCInstLower.cpp
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Expand Up @@ -2055,10 +2055,11 @@ void X86AsmPrinter::emitInstruction(const MachineInstr *MI) {
}
}

// Add a comment about EVEX-2-VEX compression for AVX-512 instrs that
// are compressed from EVEX encoding to VEX encoding.
// Add a comment about EVEX compression
if (TM.Options.MCOptions.ShowMCEncoding) {
if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_VEX)
if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_LEGACY)
OutStreamer->AddComment("EVEX TO LEGACY Compression ", false);
else if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_VEX)
OutStreamer->AddComment("EVEX TO VEX Compression ", false);
}

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6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86.ll
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Expand Up @@ -29,7 +29,7 @@ define i32 @test_mm_crc32_u8(i32 %a0, i32 %a1) nounwind {
; EGPR-LABEL: test_mm_crc32_u8:
; EGPR: # %bb.0:
; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
; EGPR-NEXT: crc32b %sil, %eax # encoding: [0x62,0xf4,0x7c,0x08,0xf0,0xc6]
; EGPR-NEXT: crc32b %sil, %eax # EVEX TO LEGACY Compression encoding: [0xf2,0x40,0x0f,0x38,0xf0,0xc6]
; EGPR-NEXT: retq # encoding: [0xc3]
%trunc = trunc i32 %a1 to i8
%res = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a0, i8 %trunc)
Expand All @@ -55,7 +55,7 @@ define i32 @test_mm_crc32_u16(i32 %a0, i32 %a1) nounwind {
; EGPR-LABEL: test_mm_crc32_u16:
; EGPR: # %bb.0:
; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
; EGPR-NEXT: crc32w %si, %eax # encoding: [0x62,0xf4,0x7d,0x08,0xf1,0xc6]
; EGPR-NEXT: crc32w %si, %eax # EVEX TO LEGACY Compression encoding: [0x66,0xf2,0x0f,0x38,0xf1,0xc6]
; EGPR-NEXT: retq # encoding: [0xc3]
%trunc = trunc i32 %a1 to i16
%res = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a0, i16 %trunc)
Expand All @@ -79,7 +79,7 @@ define i32 @test_mm_crc32_u32(i32 %a0, i32 %a1) nounwind {
; EGPR-LABEL: test_mm_crc32_u32:
; EGPR: # %bb.0:
; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
; EGPR-NEXT: crc32l %esi, %eax # encoding: [0x62,0xf4,0x7c,0x08,0xf1,0xc6]
; EGPR-NEXT: crc32l %esi, %eax # EVEX TO LEGACY Compression encoding: [0xf2,0x0f,0x38,0xf1,0xc6]
; EGPR-NEXT: retq # encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a0, i32 %a1)
ret i32 %res
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86_64.ll
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Expand Up @@ -15,7 +15,7 @@ define i64 @test_mm_crc64_u8(i64 %a0, i32 %a1) nounwind{
;
; EGPR-LABEL: test_mm_crc64_u8:
; EGPR: # %bb.0:
; EGPR-NEXT: crc32b %sil, %edi # encoding: [0x62,0xf4,0x7c,0x08,0xf0,0xfe]
; EGPR-NEXT: crc32b %sil, %edi # EVEX TO LEGACY Compression encoding: [0xf2,0x40,0x0f,0x38,0xf0,0xfe]
; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
; EGPR-NEXT: retq # encoding: [0xc3]
%trunc = trunc i32 %a1 to i8
Expand All @@ -34,7 +34,7 @@ define i64 @test_mm_crc64_u64(i64 %a0, i64 %a1) nounwind{
; EGPR-LABEL: test_mm_crc64_u64:
; EGPR: # %bb.0:
; EGPR-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
; EGPR-NEXT: crc32q %rsi, %rax # encoding: [0x62,0xf4,0xfc,0x08,0xf1,0xc6]
; EGPR-NEXT: crc32q %rsi, %rax # EVEX TO LEGACY Compression encoding: [0xf2,0x48,0x0f,0x38,0xf1,0xc6]
; EGPR-NEXT: retq # encoding: [0xc3]
%res = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a0, i64 %a1)
ret i64 %res
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6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/crc32-intrinsics-x86.ll
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Expand Up @@ -19,7 +19,7 @@ define i32 @crc32_32_8(i32 %a, i8 %b) nounwind {
; EGPR-LABEL: crc32_32_8:
; EGPR: ## %bb.0:
; EGPR-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
; EGPR-NEXT: crc32b %sil, %eax ## encoding: [0x62,0xf4,0x7c,0x08,0xf0,0xc6]
; EGPR-NEXT: crc32b %sil, %eax ## EVEX TO LEGACY Compression encoding: [0xf2,0x40,0x0f,0x38,0xf0,0xc6]
; EGPR-NEXT: retq ## encoding: [0xc3]
%tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b)
ret i32 %tmp
Expand All @@ -42,7 +42,7 @@ define i32 @crc32_32_16(i32 %a, i16 %b) nounwind {
; EGPR-LABEL: crc32_32_16:
; EGPR: ## %bb.0:
; EGPR-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
; EGPR-NEXT: crc32w %si, %eax ## encoding: [0x62,0xf4,0x7d,0x08,0xf1,0xc6]
; EGPR-NEXT: crc32w %si, %eax ## EVEX TO LEGACY Compression encoding: [0x66,0xf2,0x0f,0x38,0xf1,0xc6]
; EGPR-NEXT: retq ## encoding: [0xc3]
%tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b)
ret i32 %tmp
Expand All @@ -65,7 +65,7 @@ define i32 @crc32_32_32(i32 %a, i32 %b) nounwind {
; EGPR-LABEL: crc32_32_32:
; EGPR: ## %bb.0:
; EGPR-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
; EGPR-NEXT: crc32l %esi, %eax ## encoding: [0x62,0xf4,0x7c,0x08,0xf1,0xc6]
; EGPR-NEXT: crc32l %esi, %eax ## EVEX TO LEGACY Compression encoding: [0xf2,0x0f,0x38,0xf1,0xc6]
; EGPR-NEXT: retq ## encoding: [0xc3]
%tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b)
ret i32 %tmp
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/crc32-intrinsics-x86_64.ll
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Expand Up @@ -15,7 +15,7 @@ define i64 @crc32_64_8(i64 %a, i8 %b) nounwind {
; EGPR-LABEL: crc32_64_8:
; EGPR: ## %bb.0:
; EGPR-NEXT: movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
; EGPR-NEXT: crc32b %sil, %eax ## encoding: [0x62,0xf4,0x7c,0x08,0xf0,0xc6]
; EGPR-NEXT: crc32b %sil, %eax ## EVEX TO LEGACY Compression encoding: [0xf2,0x40,0x0f,0x38,0xf0,0xc6]
; EGPR-NEXT: retq ## encoding: [0xc3]
%tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b)
ret i64 %tmp
Expand All @@ -31,7 +31,7 @@ define i64 @crc32_64_64(i64 %a, i64 %b) nounwind {
; EGPR-LABEL: crc32_64_64:
; EGPR: ## %bb.0:
; EGPR-NEXT: movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
; EGPR-NEXT: crc32q %rsi, %rax ## encoding: [0x62,0xf4,0xfc,0x08,0xf1,0xc6]
; EGPR-NEXT: crc32q %rsi, %rax ## EVEX TO LEGACY Compression encoding: [0xf2,0x48,0x0f,0x38,0xf1,0xc6]
; EGPR-NEXT: retq ## encoding: [0xc3]
%tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b)
ret i64 %tmp
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/invpcid-intrinsic.ll
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Expand Up @@ -20,7 +20,7 @@ define void @test_invpcid(i32 %type, ptr %descriptor) {
; EGPR-LABEL: test_invpcid:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
; EGPR-NEXT: invpcid (%rsi), %rax # encoding: [0x62,0xf4,0x7e,0x08,0xf2,0x06]
; EGPR-NEXT: invpcid (%rsi), %rax # EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0x82,0x06]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
call void @llvm.x86.invpcid(i32 %type, ptr %descriptor)
Expand All @@ -45,7 +45,7 @@ define void @test_invpcid2(ptr readonly %type, ptr %descriptor) {
; EGPR-LABEL: test_invpcid2:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: movl (%rdi), %eax # encoding: [0x8b,0x07]
; EGPR-NEXT: invpcid (%rsi), %rax # encoding: [0x62,0xf4,0x7e,0x08,0xf2,0x06]
; EGPR-NEXT: invpcid (%rsi), %rax # EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0x82,0x06]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = load i32, ptr %type, align 4
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/movdir-intrinsic-x86.ll
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Expand Up @@ -18,7 +18,7 @@ define void @test_movdiri(ptr %p, i32 %v) {
;
; EGPR-LABEL: test_movdiri:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: movdiri %esi, (%rdi) # encoding: [0x62,0xf4,0x7c,0x08,0xf9,0x37]
; EGPR-NEXT: movdiri %esi, (%rdi) # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xf9,0x37]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
call void @llvm.x86.directstore32(ptr %p, i32 %v)
Expand All @@ -42,7 +42,7 @@ define void @test_movdir64b(ptr %dst, ptr %src) {
;
; EGPR-LABEL: test_movdir64b:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: movdir64b (%rsi), %rdi # encoding: [0x62,0xf4,0x7d,0x08,0xf8,0x3e]
; EGPR-NEXT: movdir64b (%rsi), %rdi # EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0xf8,0x3e]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
call void @llvm.x86.movdir64b(ptr %dst, ptr %src)
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/movdir-intrinsic-x86_64.ll
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Expand Up @@ -10,7 +10,7 @@ define void @test_movdiri(ptr %p, i64 %v) {
;
; EGPR-LABEL: test_movdiri:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: movdiri %rsi, (%rdi) # encoding: [0x62,0xf4,0xfc,0x08,0xf9,0x37]
; EGPR-NEXT: movdiri %rsi, (%rdi) # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x38,0xf9,0x37]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
call void @llvm.x86.directstore64(ptr %p, i64 %v)
Expand Down
30 changes: 15 additions & 15 deletions llvm/test/CodeGen/X86/sha.ll
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Expand Up @@ -18,7 +18,7 @@ define <4 x i32> @test_sha1rnds4rr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable
;
; EGPR-LABEL: test_sha1rnds4rr:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha1rnds4 $3, %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd4,0xc1,0x03]
; EGPR-NEXT: sha1rnds4 $3, %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x3a,0xcc,0xc1,0x03]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call <4 x i32> @llvm.x86.sha1rnds4(<4 x i32> %a, <4 x i32> %b, i8 3)
Expand All @@ -38,7 +38,7 @@ define <4 x i32> @test_sha1rnds4rm(<4 x i32> %a, ptr %b) nounwind uwtable {
;
; EGPR-LABEL: test_sha1rnds4rm:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha1rnds4 $3, (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd4,0x07,0x03]
; EGPR-NEXT: sha1rnds4 $3, (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x3a,0xcc,0x07,0x03]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = load <4 x i32>, ptr %b
Expand All @@ -61,7 +61,7 @@ define <4 x i32> @test_sha1nexterr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable
;
; EGPR-LABEL: test_sha1nexterr:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha1nexte %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd8,0xc1]
; EGPR-NEXT: sha1nexte %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xc8,0xc1]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call <4 x i32> @llvm.x86.sha1nexte(<4 x i32> %a, <4 x i32> %b)
Expand All @@ -81,7 +81,7 @@ define <4 x i32> @test_sha1nexterm(<4 x i32> %a, ptr %b) nounwind uwtable {
;
; EGPR-LABEL: test_sha1nexterm:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha1nexte (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd8,0x07]
; EGPR-NEXT: sha1nexte (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xc8,0x07]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = load <4 x i32>, ptr %b
Expand All @@ -104,7 +104,7 @@ define <4 x i32> @test_sha1msg1rr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable {
;
; EGPR-LABEL: test_sha1msg1rr:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha1msg1 %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd9,0xc1]
; EGPR-NEXT: sha1msg1 %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xc9,0xc1]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call <4 x i32> @llvm.x86.sha1msg1(<4 x i32> %a, <4 x i32> %b)
Expand All @@ -124,7 +124,7 @@ define <4 x i32> @test_sha1msg1rm(<4 x i32> %a, ptr %b) nounwind uwtable {
;
; EGPR-LABEL: test_sha1msg1rm:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha1msg1 (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd9,0x07]
; EGPR-NEXT: sha1msg1 (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xc9,0x07]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = load <4 x i32>, ptr %b
Expand All @@ -147,7 +147,7 @@ define <4 x i32> @test_sha1msg2rr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable {
;
; EGPR-LABEL: test_sha1msg2rr:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha1msg2 %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xda,0xc1]
; EGPR-NEXT: sha1msg2 %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xca,0xc1]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call <4 x i32> @llvm.x86.sha1msg2(<4 x i32> %a, <4 x i32> %b)
Expand All @@ -167,7 +167,7 @@ define <4 x i32> @test_sha1msg2rm(<4 x i32> %a, ptr %b) nounwind uwtable {
;
; EGPR-LABEL: test_sha1msg2rm:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha1msg2 (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xda,0x07]
; EGPR-NEXT: sha1msg2 (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xca,0x07]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = load <4 x i32>, ptr %b
Expand Down Expand Up @@ -198,7 +198,7 @@ define <4 x i32> @test_sha256rnds2rr(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) n
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: movaps %xmm0, %xmm3 # encoding: [0x0f,0x28,0xd8]
; EGPR-NEXT: movaps %xmm2, %xmm0 # encoding: [0x0f,0x28,0xc2]
; EGPR-NEXT: sha256rnds2 %xmm0, %xmm1, %xmm3 # encoding: [0x62,0xf4,0x7c,0x08,0xdb,0xd9]
; EGPR-NEXT: sha256rnds2 %xmm0, %xmm1, %xmm3 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcb,0xd9]
; EGPR-NEXT: movaps %xmm3, %xmm0 # encoding: [0x0f,0x28,0xc3]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
Expand Down Expand Up @@ -227,7 +227,7 @@ define <4 x i32> @test_sha256rnds2rm(<4 x i32> %a, ptr %b, <4 x i32> %c) nounwin
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: movaps %xmm0, %xmm2 # encoding: [0x0f,0x28,0xd0]
; EGPR-NEXT: movaps %xmm1, %xmm0 # encoding: [0x0f,0x28,0xc1]
; EGPR-NEXT: sha256rnds2 %xmm0, (%rdi), %xmm2 # encoding: [0x62,0xf4,0x7c,0x08,0xdb,0x17]
; EGPR-NEXT: sha256rnds2 %xmm0, (%rdi), %xmm2 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcb,0x17]
; EGPR-NEXT: movaps %xmm2, %xmm0 # encoding: [0x0f,0x28,0xc2]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
Expand All @@ -251,7 +251,7 @@ define <4 x i32> @test_sha256msg1rr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable
;
; EGPR-LABEL: test_sha256msg1rr:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha256msg1 %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xdc,0xc1]
; EGPR-NEXT: sha256msg1 %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcc,0xc1]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call <4 x i32> @llvm.x86.sha256msg1(<4 x i32> %a, <4 x i32> %b)
Expand All @@ -271,7 +271,7 @@ define <4 x i32> @test_sha256msg1rm(<4 x i32> %a, ptr %b) nounwind uwtable {
;
; EGPR-LABEL: test_sha256msg1rm:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha256msg1 (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xdc,0x07]
; EGPR-NEXT: sha256msg1 (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcc,0x07]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = load <4 x i32>, ptr %b
Expand All @@ -294,7 +294,7 @@ define <4 x i32> @test_sha256msg2rr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable
;
; EGPR-LABEL: test_sha256msg2rr:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha256msg2 %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xdd,0xc1]
; EGPR-NEXT: sha256msg2 %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcd,0xc1]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call <4 x i32> @llvm.x86.sha256msg2(<4 x i32> %a, <4 x i32> %b)
Expand All @@ -314,7 +314,7 @@ define <4 x i32> @test_sha256msg2rm(<4 x i32> %a, ptr %b) nounwind uwtable {
;
; EGPR-LABEL: test_sha256msg2rm:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha256msg2 (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xdd,0x07]
; EGPR-NEXT: sha256msg2 (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcd,0x07]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = load <4 x i32>, ptr %b
Expand All @@ -338,7 +338,7 @@ define <8 x i32> @test_sha1rnds4_zero_extend(<4 x i32> %a, ptr %b) nounwind uwta
;
; EGPR-LABEL: test_sha1rnds4_zero_extend:
; EGPR: # %bb.0: # %entry
; EGPR-NEXT: sha1rnds4 $3, (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd4,0x07,0x03]
; EGPR-NEXT: sha1rnds4 $3, (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x3a,0xcc,0x07,0x03]
; EGPR-NEXT: xorps %xmm1, %xmm1 # encoding: [0x0f,0x57,0xc9]
; EGPR-NEXT: retq # encoding: [0xc3]
entry:
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/x64-cet-intrinsics.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -119,7 +119,7 @@ define void @test_wrssd(i32 %a, ptr %__p) {
;
; EGPR-LABEL: test_wrssd:
; EGPR: ## %bb.0: ## %entry
; EGPR-NEXT: wrssd %edi, (%rsi) ## encoding: [0x62,0xf4,0x7c,0x08,0x66,0x3e]
; EGPR-NEXT: wrssd %edi, (%rsi) ## EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xf6,0x3e]
; EGPR-NEXT: retq ## encoding: [0xc3]
entry:
tail call void @llvm.x86.wrssd(i32 %a, ptr %__p)
Expand All @@ -136,7 +136,7 @@ define void @test_wrssq(i64 %a, ptr %__p) {
;
; EGPR-LABEL: test_wrssq:
; EGPR: ## %bb.0: ## %entry
; EGPR-NEXT: wrssq %rdi, (%rsi) ## encoding: [0x62,0xf4,0xfc,0x08,0x66,0x3e]
; EGPR-NEXT: wrssq %rdi, (%rsi) ## EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x38,0xf6,0x3e]
; EGPR-NEXT: retq ## encoding: [0xc3]
entry:
tail call void @llvm.x86.wrssq(i64 %a, ptr %__p)
Expand All @@ -153,7 +153,7 @@ define void @test_wrussd(i32 %a, ptr %__p) {
;
; EGPR-LABEL: test_wrussd:
; EGPR: ## %bb.0: ## %entry
; EGPR-NEXT: wrussd %edi, (%rsi) ## encoding: [0x62,0xf4,0x7d,0x08,0x65,0x3e]
; EGPR-NEXT: wrussd %edi, (%rsi) ## EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0xf5,0x3e]
; EGPR-NEXT: retq ## encoding: [0xc3]
entry:
tail call void @llvm.x86.wrussd(i32 %a, ptr %__p)
Expand All @@ -170,7 +170,7 @@ define void @test_wrussq(i64 %a, ptr %__p) {
;
; EGPR-LABEL: test_wrussq:
; EGPR: ## %bb.0: ## %entry
; EGPR-NEXT: wrussq %rdi, (%rsi) ## encoding: [0x62,0xf4,0xfd,0x08,0x65,0x3e]
; EGPR-NEXT: wrussq %rdi, (%rsi) ## EVEX TO LEGACY Compression encoding: [0x66,0x48,0x0f,0x38,0xf5,0x3e]
; EGPR-NEXT: retq ## encoding: [0xc3]
entry:
tail call void @llvm.x86.wrussq(i64 %a, ptr %__p)
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9 changes: 6 additions & 3 deletions llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
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Expand Up @@ -166,13 +166,16 @@ void X86CompressEVEXTablesEmitter::run(raw_ostream &OS) {

for (const CodeGenInstruction *Inst : PreCompressionInsts) {
const Record *Rec = Inst->TheDef;
uint8_t Opcode =
byteFromBitsInit(Inst->TheDef->getValueAsBitsInit("Opcode"));
uint8_t Opcode = byteFromBitsInit(Rec->getValueAsBitsInit("Opcode"));
StringRef Name = Rec->getName();
const CodeGenInstruction *NewInst = nullptr;
if (ManualMap.find(Rec->getName()) != ManualMap.end()) {
if (ManualMap.find(Name) != ManualMap.end()) {
Record *NewRec = Records.getDef(ManualMap.at(Rec->getName()));
assert(NewRec && "Instruction not found!");
NewInst = &Target.getInstruction(NewRec);
} else if (Name.ends_with("_EVEX")) {
if (auto *NewRec = Records.getDef(Name.drop_back(5)))
NewInst = &Target.getInstruction(NewRec);
} else {
// For each pre-compression instruction look for a match in the appropriate
// vector (instructions with the same opcode) using function object
Expand Down