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release/18.x: [PowerPC] Mask constant operands in ValueBit tracking (#67653) #82301

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Merged
merged 1 commit into from
Feb 20, 2024

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@llvmbot llvmbot commented Feb 20, 2024

Backport 292d9e8

Requested by: @ecnelises

@llvmbot llvmbot added this to the LLVM 18.X Release milestone Feb 20, 2024
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llvmbot commented Feb 20, 2024

@bzEq What do you think about merging this PR to the release branch?

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LG.

In IR or C code, shift amount larger than value size is undefined
behavior. But in practice, backend lowering for shift_parts produces
add/sub of shift amounts, thus constant shift amounts might be
negative or larger than value size, which depends on ISA definition.

PowerPC ISA says, the lowest 7 bits (6 bits for 32-bit instruction)
will be taken, and if the highest among them is 1, result will be
zero, otherwise the low 6 bits (or 5 on 32-bit) are used as shift
amount.

This commit emulates the behavior and avoids array overflow in bit
permutation's value bits calculator.

(cherry picked from commit 292d9e8)
@tstellar tstellar merged commit 3b4b047 into llvm:release/18.x Feb 20, 2024
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4 participants