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[LoongArch] Make sure that the LoongArchISD::BSTRINS node uses the correct MSB value #84454

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Merged
merged 1 commit into from
Mar 11, 2024
Merged

[LoongArch] Make sure that the LoongArchISD::BSTRINS node uses the correct MSB value #84454

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4 changes: 3 additions & 1 deletion llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2366,7 +2366,9 @@ static SDValue performORCombine(SDNode *N, SelectionDAG &DAG,
return DAG.getNode(
LoongArchISD::BSTRINS, DL, ValTy, N0.getOperand(0),
DAG.getConstant(CN1->getSExtValue() >> MaskIdx0, DL, ValTy),
DAG.getConstant((MaskIdx0 + MaskLen0 - 1), DL, GRLenVT),
DAG.getConstant(ValBits == 32 ? (MaskIdx0 + (MaskLen0 & 31) - 1)
: (MaskIdx0 + MaskLen0 - 1),
DL, GRLenVT),
DAG.getConstant(MaskIdx0, DL, GRLenVT));
}

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13 changes: 13 additions & 0 deletions llvm/test/CodeGen/LoongArch/bstrins_w.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -145,6 +145,19 @@ define i32 @pat5(i32 %a) nounwind {
ret i32 %or
}

;; The high bits of `const` are zero.
define i32 @pat5_high_zeros(i32 %a) nounwind {
; CHECK-LABEL: pat5_high_zeros:
; CHECK: # %bb.0:
; CHECK-NEXT: lu12i.w $a1, 1
; CHECK-NEXT: ori $a1, $a1, 564
; CHECK-NEXT: bstrins.w $a0, $a1, 31, 16
; CHECK-NEXT: ret
%and = and i32 %a, 65535 ; 0x0000ffff
%or = or i32 %and, 305397760 ; 0x12340000
ret i32 %or
}

;; Pattern 6: a = b | ((c & mask) << shamt)
;; In this testcase b is 0x10000002, but in fact we do not require b being a
;; constant. As long as all positions in b to be overwritten by the incoming
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