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release/18.x: [LoongArch] Use R_LARCH_ALIGN with section symbol (#84741) #88891

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release/18.x: [LoongArch] Use R_LARCH_ALIGN with section symbol (#84741) #88891

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bb652e6
[test] Make dwarf-loongarch-relocs.ll non-sensitive of function align…
SixWeining Jan 24, 2024
14a41dc
[LoongArch] Use R_LARCH_ALIGN with section symbol (#84741)
MQ-mengqing Apr 16, 2024
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6 changes: 5 additions & 1 deletion lld/ELF/InputSection.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -462,7 +462,11 @@ void InputSection::copyRelocations(uint8_t *buf,
addend += sec->getFile<ELFT>()->mipsGp0;
}

if (RelTy::IsRela)
if (config->emachine == EM_LOONGARCH && type == R_LARCH_ALIGN)
// LoongArch psABI v2.30, the R_LARCH_ALIGN requires symbol index.
// If it use the section symbol, the addend should not be changed.
p->r_addend = addend;
else if (RelTy::IsRela)
p->r_addend = sym.getVA(addend) - section->getOutputSection()->addr;
// For SHF_ALLOC sections relocated by REL, append a relocation to
// sec->relocations so that relocateAlloc transitively called by
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28 changes: 28 additions & 0 deletions lld/test/ELF/loongarch-relax-align-ldr.s
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@@ -0,0 +1,28 @@
# REQUIRES: loongarch
## Test `ld -r` not changes the addend of R_LARCH_ALIGN.

# RUN: llvm-mc --filetype=obj --triple=loongarch64 --mattr=+relax %s -o %t.64.o
# RUN: ld.lld -r %t.64.o %t.64.o -o %t.64.r
# RUN: llvm-objdump -dr --no-show-raw-insn %t.64.r | FileCheck %s

# CHECK: <.text>:
# CHECK-NEXT: break 1
# CHECK-NEXT: nop
# CHECK-NEXT: {{0*}}04: R_LARCH_ALIGN .text+0x804
# CHECK-NEXT: nop
# CHECK-NEXT: nop
# CHECK-NEXT: break 2
# CHECK-NEXT: break 0
# CHECK-NEXT: break 0
# CHECK-NEXT: break 0
# CHECK-NEXT: break 1
# CHECK-NEXT: nop
# CHECK-NEXT: {{0*}}24: R_LARCH_ALIGN .text+0x804
# CHECK-NEXT: nop
# CHECK-NEXT: nop
# CHECK-NEXT: break 2

.text
break 1
.p2align 4, , 8
break 2
5 changes: 3 additions & 2 deletions lld/test/ELF/loongarch-relax-emit-relocs.s
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Expand Up @@ -25,7 +25,7 @@
# CHECK-NEXT: R_LARCH_PCALA_LO12 _start
# CHECK-NEXT: R_LARCH_RELAX *ABS*
# CHECK-NEXT: nop
# CHECK-NEXT: R_LARCH_ALIGN .Lla-relax-align0+0x4
# CHECK-NEXT: R_LARCH_ALIGN .text+0x4
# CHECK-NEXT: nop
# CHECK-NEXT: ret

Expand All @@ -37,11 +37,12 @@
# CHECKR-NEXT: R_LARCH_PCALA_LO12 _start
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
# CHECKR-NEXT: nop
# CHECKR-NEXT: R_LARCH_ALIGN .Lla-relax-align0+0x4
# CHECKR-NEXT: R_LARCH_ALIGN .text+0x4
# CHECKR-NEXT: nop
# CHECKR-NEXT: nop
# CHECKR-NEXT: ret

.text
.global _start
_start:
la.pcrel $a0, _start
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7 changes: 2 additions & 5 deletions llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
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Expand Up @@ -226,11 +226,8 @@ bool LoongArchAsmBackend::shouldInsertFixupForCodeAlign(
MCFixup::create(0, Dummy, MCFixupKind(LoongArch::fixup_loongarch_align));
const MCSymbolRefExpr *MCSym = getSecToAlignSym()[Sec];
if (MCSym == nullptr) {
// Create a symbol and make the value of symbol is zero.
MCSymbol *Sym = Ctx.createNamedTempSymbol("la-relax-align");
Sym->setFragment(&*Sec->getBeginSymbol()->getFragment());
Asm.registerSymbol(*Sym);
MCSym = MCSymbolRefExpr::create(Sym, Ctx);
// Use section symbol directly.
MCSym = MCSymbolRefExpr::create(Sec->getBeginSymbol(), Ctx);
getSecToAlignSym()[Sec] = MCSym;
}

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39 changes: 15 additions & 24 deletions llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
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@@ -1,22 +1,19 @@
; RUN: llc --filetype=obj --mtriple=loongarch64 --mattr=-relax %s -o %t.o
; RUN: llvm-readobj -r %t.o | FileCheck --check-prefixes=RELOCS-BOTH,RELOCS-NORL %s
; RUN: llvm-objdump --source %t.o | FileCheck --check-prefixes=SOURCE,SOURCE-NORL %s
; RUN: llvm-dwarfdump --debug-info --debug-line %t.o | FileCheck --check-prefixes=DWARF,DWARF-NORL %s
; RUN: llvm-objdump --source %t.o | FileCheck --check-prefix=SOURCE %s
; RUN: llvm-dwarfdump --debug-info --debug-line %t.o | FileCheck --check-prefix=DWARF %s

; RUN: llc --filetype=obj --mtriple=loongarch64 --mattr=+relax %s -o %t.r.o
; RUN: llc --filetype=obj --mtriple=loongarch64 --mattr=+relax --align-all-functions=2 %s -o %t.r.o
; RUN: llvm-readobj -r %t.r.o | FileCheck --check-prefixes=RELOCS-BOTH,RELOCS-ENRL %s
; RUN: llvm-objdump --source %t.r.o | FileCheck --check-prefixes=SOURCE,SOURCE-ENRL %s
; RUN: llvm-dwarfdump --debug-info --debug-line %t.r.o | FileCheck --check-prefixes=DWARF,DWARF-ENRL %s
; RUN: llvm-objdump --source %t.r.o | FileCheck --check-prefix=SOURCE %s
; RUN: llvm-dwarfdump --debug-info --debug-line %t.r.o | FileCheck --check-prefix=DWARF %s

; RELOCS-BOTH: Relocations [
; RELOCS-BOTH-NEXT: Section ({{.*}}) .rela.text {
; RELOCS-NORL-NEXT: 0x14 R_LARCH_PCALA_HI20 sym 0x0
; RELOCS-NORL-NEXT: 0x18 R_LARCH_PCALA_LO12 sym 0x0
; RELOCS-ENRL-NEXT: 0x0 R_LARCH_ALIGN .Lla-relax-align0 0x5
; RELOCS-ENRL-NEXT: 0x30 R_LARCH_PCALA_HI20 sym 0x0
; RELOCS-ENRL-NEXT: 0x30 R_LARCH_RELAX - 0x0
; RELOCS-ENRL-NEXT: 0x34 R_LARCH_PCALA_LO12 sym 0x0
; RELOCS-ENRL-NEXT: 0x34 R_LARCH_RELAX - 0x0
; RELOCS-BOTH-NEXT: 0x14 R_LARCH_PCALA_HI20 sym 0x0
; RELOCS-ENRL-NEXT: 0x14 R_LARCH_RELAX - 0x0
; RELOCS-BOTH-NEXT: 0x18 R_LARCH_PCALA_LO12 sym 0x0
; RELOCS-ENRL-NEXT: 0x18 R_LARCH_RELAX - 0x0
; RELOCS-BOTH-NEXT: }
; RELOCS-BOTH: Section ({{.*}}) .rela.debug_frame {
; RELOCS-NORL-NEXT: 0x1C R_LARCH_32 .debug_frame 0x0
Expand All @@ -39,8 +36,7 @@
; RELOCS-BOTH-NEXT: }
; RELOCS-BOTH-NEXT: ]

; SOURCE-NORL: 0000000000000000 <foo>:
; SOURCE-ENRL: 000000000000001c <foo>:
; SOURCE: 0000000000000000 <foo>:
; SOURCE: ; {
; SOURCE: ; asm volatile(
; SOURCE: ; return 0;
Expand Down Expand Up @@ -91,16 +87,11 @@
; DWARF-EMPTY:
; DWARF-NEXT: Address Line Column File ISA Discriminator OpIndex Flags
; DWARF-NEXT: ------------------ ------ ------ ------ --- ------------- ------- -------------
; DWARF-NORL-NEXT: 0x0000000000000000 2 0 0 0 0 0 is_stmt
; DWARF-NORL-NEXT: 0x0000000000000010 3 3 0 0 0 0 is_stmt prologue_end
; DWARF-NORL-NEXT: 0x0000000000000020 10 3 0 0 0 0 is_stmt
; DWARF-NORL-NEXT: 0x000000000000002c 10 3 0 0 0 0 epilogue_begin
; DWARF-NORL-NEXT: 0x0000000000000034 10 3 0 0 0 0 end_sequence
; DWARF-ENRL-NEXT: 0x000000000000001c 2 0 0 0 0 0 is_stmt
; DWARF-ENRL-NEXT: 0x000000000000002c 3 3 0 0 0 0 is_stmt prologue_end
; DWARF-ENRL-NEXT: 0x000000000000003c 10 3 0 0 0 0 is_stmt
; DWARF-ENRL-NEXT: 0x0000000000000048 10 3 0 0 0 0 epilogue_begin
; DWARF-ENRL-NEXT: 0x0000000000000050 10 3 0 0 0 0 end_sequence
; DWARF-NEXT: 0x0000000000000000 2 0 0 0 0 0 is_stmt
; DWARF-NEXT: 0x0000000000000010 3 3 0 0 0 0 is_stmt prologue_end
; DWARF-NEXT: 0x0000000000000020 10 3 0 0 0 0 is_stmt
; DWARF-NEXT: 0x000000000000002c 10 3 0 0 0 0 epilogue_begin
; DWARF-NEXT: 0x0000000000000034 10 3 0 0 0 0 end_sequence

; ModuleID = 'dwarf-loongarch-relocs.c'
source_filename = "dwarf-loongarch-relocs.c"
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2 changes: 1 addition & 1 deletion llvm/test/MC/LoongArch/Relocations/relax-addsub.s
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Expand Up @@ -28,7 +28,7 @@

# RELAX: Relocations [
# RELAX-NEXT: Section ({{.*}}) .rela.text {
# RELAX-NEXT: 0x4 R_LARCH_ALIGN {{.*}} 0x4
# RELAX-NEXT: 0x4 R_LARCH_ALIGN .text 0x4
# RELAX-NEXT: 0x10 R_LARCH_PCALA_HI20 .L1 0x0
# RELAX-NEXT: 0x10 R_LARCH_RELAX - 0x0
# RELAX-NEXT: 0x14 R_LARCH_PCALA_LO12 .L1 0x0
Expand Down
14 changes: 8 additions & 6 deletions llvm/test/MC/LoongArch/Relocations/relax-align.s
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Expand Up @@ -63,17 +63,19 @@ ret
## Test the symbol index is different from .text.
.section .text2, "ax"
.p2align 4
.p2align 4, , 4
break 7

# RELOC: Relocations [
# RELAX-RELOC-NEXT: Section ({{.*}}) .rela.text {
# RELAX-RELOC-NEXT: 0x24 R_LARCH_ALIGN .Lla-relax-align0 0x4
# RELAX-RELOC-NEXT: 0x34 R_LARCH_ALIGN .Lla-relax-align0 0x5
# RELAX-RELOC-NEXT: 0x50 R_LARCH_ALIGN .Lla-relax-align0 0x4
# RELAX-RELOC-NEXT: 0x60 R_LARCH_ALIGN .Lla-relax-align0 0xB04
# RELAX-RELOC-NEXT: 0x70 R_LARCH_ALIGN .Lla-relax-align0 0x4
# RELAX-RELOC-NEXT: 0x24 R_LARCH_ALIGN .text 0x4
# RELAX-RELOC-NEXT: 0x34 R_LARCH_ALIGN .text 0x5
# RELAX-RELOC-NEXT: 0x50 R_LARCH_ALIGN .text 0x4
# RELAX-RELOC-NEXT: 0x60 R_LARCH_ALIGN .text 0xB04
# RELAX-RELOC-NEXT: 0x70 R_LARCH_ALIGN .text 0x4
# RELAX-RELOC-NEXT: }
# RELAX-RELOC-NEXT: Section ({{.*}}) .rela.text2 {
# RELAX-RELOC-NEXT: 0x0 R_LARCH_ALIGN .Lla-relax-align1 0x4
# RELAX-RELOC-NEXT: 0x0 R_LARCH_ALIGN .text2 0x4
# RELAX-RELOC-NEXT: 0xC R_LARCH_ALIGN .text2 0x404
# RELAX-RELOC-NEXT: }
# RELOC-NEXT: ]