Skip to content

dts: Increase default coherent pool size #2949

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
May 1, 2019

Conversation

P33M
Copy link
Contributor

@P33M P33M commented May 1, 2019

dwc_otg allocates DMA-coherent buffers in atomic context for misaligned
transfer buffers. The pool that these allocations come from is set up
at boot-time but can be overridden by a commandline parameter -
increase this for now to prevent failures seen on 4.19 with multiple
USB Ethernet devices.

see: #2924

There's a series of patches to come after this, namely:

  • dwc_otg properly returning failure to URB submitters instead of failing silently (WIP)
  • Getting the lan95xx driver to submit aligned tx buffers (working but needs more testing)
  • Getting the lan78xx driver to submit aligned tx buffers (may or may not be possible)

dwc_otg allocates DMA-coherent buffers in atomic context for misaligned
transfer buffers. The pool that these allocations come from is set up
at boot-time but can be overridden by a commandline parameter -
increase this for now to prevent failures seen on 4.19 with multiple
USB Ethernet devices.

see: raspberrypi#2924
@pelwell pelwell merged commit cd07072 into raspberrypi:rpi-4.19.y May 1, 2019
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants