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Merged
merged 4 commits into from
Nov 6, 2024
Merged

More dwc3 quirks #6457

merged 4 commits into from
Nov 6, 2024

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P33M
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@P33M P33M commented Nov 6, 2024

More fallout from #6141 - I'm not sure why it was just the BT dongle that tripped over the TRB race - but the suspicious conditions are all met - only a single TRB is ever posted, and there's very little other activity on the bus at the same time as interrupt/control transfers are posted in lockstep.

P33M added 4 commits November 6, 2024 10:45
Add two quirk properties that control whether or not the controller
issues many more handshakes to FS/HS Async endpoints in a single
(micro)frame. Enabling these can significantly increase throughput for
endpoints that frequently respond with NAKs.

Signed-off-by: Jonathan Bell <[email protected]>
If a device frequently NAKs, it can exhaust the scheduled handshakes in
a frame. It will then not get polled by the controller until the next
frame interval. This is most noticeable on FS devices as the controller
schedules a small set of transactions only once per full-speed frame.

Setting the ENH_PER_NAK_FS/LS bits in the GUCTL1 register increases the
number of transactions that can be scheduled to Async (Control/Bulk)
endpoints in the respective frame time. In the FS case, this only
applies to FS devices directly connected to root ports.

Signed-off-by: Jonathan Bell <[email protected]>
There seem to be only benefits, and no downsides.

Signed-off-by: Jonathan Bell <[email protected]>
For platforms that have xHCI controllers attached over PCIe, and
non-coherent routes to main memory, a theoretical race exists between
posting new TRBs to a ring, and writing to the doorbell register.

In a contended system, write traffic from the CPU may be stalled before
the memory controller, whereas the CPU to Endpoint route is separate
and not likely to be contended. Similarly, the DMA route from the
endpoint to main memory may be separate and uncontended.

Therefore the xHCI can receive a doorbell write and find a stale view
of a transfer ring. In cases where only a single TRB is ping-ponged at
a time, this can cause the endpoint to not get polled at all.

Adding a readl() before the write forces a round-trip transaction
across PCIe, definitively serialising the CPU along the PCI
producer-consumer ordering rules.

Signed-off-by: Jonathan Bell <[email protected]>
@pelwell pelwell merged commit e9e852a into raspberrypi:rpi-6.6.y Nov 6, 2024
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P33M commented Nov 6, 2024

fyi this also applies cleanly to 6.12, will do so...

popcornmix added a commit to raspberrypi/firmware that referenced this pull request Nov 8, 2024
See: raspberrypi/linux#6458

kernel: dmaengine: dw-axi-dmac: Allow client-chosen width
See: raspberrypi/linux#6377

kernel: drm/vc4: Allow option to transpose the output on the writeback connector
See: raspberrypi/linux#6312

kernel: raspberrypi/linux#6454
See: raspberrypi/linux#6454

kernel: More dwc3 quirks
See: raspberrypi/linux#6457

kernel: mmc: quirks: add more broken Kingston Canvas Go! SD card date ranges
See: raspberrypi/linux#6447
popcornmix added a commit to raspberrypi/rpi-firmware that referenced this pull request Nov 8, 2024
See: raspberrypi/linux#6458

kernel: dmaengine: dw-axi-dmac: Allow client-chosen width
See: raspberrypi/linux#6377

kernel: drm/vc4: Allow option to transpose the output on the writeback connector
See: raspberrypi/linux#6312

kernel: raspberrypi/linux#6454
See: raspberrypi/linux#6454

kernel: More dwc3 quirks
See: raspberrypi/linux#6457

kernel: mmc: quirks: add more broken Kingston Canvas Go! SD card date ranges
See: raspberrypi/linux#6447
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2 participants