rust-embedded · lingfuyi · May 16, 2025 · May 16, 2025 · May 16, 2025 · May 19, 2025
diff --git a/src/registers.rs b/src/registers.rs
@@ -53,7 +53,13 @@ mod far_el1;
 mod far_el2;
 mod far_el3;
 mod fp;
+mod hafgrtr_el2;
 mod hcr_el2;
+mod hdfgrtr_el2;
+mod hdfgwtr_el2;
+mod hfgitr_el2;
+mod hfgrtr_el2;
+mod hfgwtr_el2;
 mod hpfar_el2;
 mod icc_ctlr_el1;
 mod icc_sre_el2;
@@ -181,7 +187,13 @@ pub use far_el1::FAR_EL1;
 pub use far_el2::FAR_EL2;
 pub use far_el3::FAR_EL3;
 pub use fp::FP;
+pub use hafgrtr_el2::HAFGRTR_EL2;
 pub use hcr_el2::HCR_EL2;
+pub use hdfgrtr_el2::HDFGRTR_EL2;
+pub use hdfgwtr_el2::HDFGWTR_EL2;
+pub use hfgitr_el2::HFGITR_EL2;
+pub use hfgrtr_el2::HFGRTR_EL2;
+pub use hfgwtr_el2::HFGWTR_EL2;
 pub use hpfar_el2::HPFAR_EL2;
 pub use icc_ctlr_el1::ICC_CTLR_EL1;
 pub use icc_sre_el2::ICC_SRE_EL2;

diff --git a/src/registers/hafgrtr_el2.rs b/src/registers/hafgrtr_el2.rs
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: Apache-2.0 OR MIT
+//
+// Copyright (c) 2025 by the author(s)
+//
+// Author(s):
+//   - lingfuyi. <[email protected]>
+// https://developer.arm.com/documentation/ddi0601/2025-03/AArch64-Registers/HDFGRTR-EL2--Hypervisor-Debug-Fine-Grained-Read-Trap-Register?lang=en
+
+//! Hypervisor Activity Monitors Fine-Grained Read Trap Register - EL2
+//!
+//! Provides controls for traps of MRS reads of Activity Monitors System registers.
+
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+};
+
+register_bitfields! {u64,
+    pub HAFGRTR_EL2 [
+        // 63-50: RES0, 保留位，写0
+        /// Trap MRS reads of AMEVTYPER115_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER115_EL0 OFFSET(49) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR115_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR115_EL0  OFFSET(48) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER114_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER114_EL0 OFFSET(47) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR114_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR114_EL0  OFFSET(46) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER113_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER113_EL0 OFFSET(45) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR113_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR113_EL0  OFFSET(44) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER112_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER112_EL0 OFFSET(43) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR112_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR112_EL0  OFFSET(42) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER111_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER111_EL0 OFFSET(41) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR111_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR111_EL0  OFFSET(40) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER110_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER110_EL0 OFFSET(39) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR110_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR110_EL0  OFFSET(38) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER19_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER19_EL0  OFFSET(37) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR19_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR19_EL0   OFFSET(36) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER18_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER18_EL0  OFFSET(35) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR18_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR18_EL0   OFFSET(34) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER17_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER17_EL0  OFFSET(33) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR17_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR17_EL0   OFFSET(32) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER16_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER16_EL0  OFFSET(31) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR16_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR16_EL0   OFFSET(30) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER15_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER15_EL0  OFFSET(29) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR15_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR15_EL0   OFFSET(28) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER14_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER14_EL0  OFFSET(27) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR14_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR14_EL0   OFFSET(26) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER13_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER13_EL0  OFFSET(25) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR13_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR13_EL0   OFFSET(24) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER12_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER12_EL0  OFFSET(23) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR12_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR12_EL0   OFFSET(22) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER11_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER11_EL0  OFFSET(21) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR11_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR11_EL0   OFFSET(20) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVTYPER10_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVTYPER10_EL0  OFFSET(19) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR10_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR10_EL0   OFFSET(18) NUMBITS(1) [],
+        /// Trap MRS reads of AMCNTEN1 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMCNTEN1        OFFSET(17) NUMBITS(1) [],
+        // 16-5: RES0, 保留位，写0
+        /// Trap MRS reads of AMEVCNTR03_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR03_EL0  OFFSET(4) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR02_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR02_EL0  OFFSET(3) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR01_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR01_EL0  OFFSET(2) NUMBITS(1) [],
+        /// Trap MRS reads of AMEVCNTR00_EL0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMEVCNTR00_EL0  OFFSET(1) NUMBITS(1) [],
+        /// Trap MRS reads of AMCNTEN0 at EL1/EL0 using AArch64 or MRC at EL0 using AArch32 to EL2.
+        AMCNTEN0        OFFSET(0) NUMBITS(1) [],
+    ]
+}
+
+pub struct Reg;
+
+impl Readable for Reg {
+    type T = u64;
+    type R = HAFGRTR_EL2::Register;
+
+    sys_coproc_read_raw!(u64, "S3_4_C3_C1_6", "x");
+}
+
+impl Writeable for Reg {
+    type T = u64;
+    type R = HAFGRTR_EL2::Register;
+
+    sys_coproc_write_raw!(u64, "S3_4_C3_C1_6", "x");
+}
+
+pub const HAFGRTR_EL2: Reg = Reg {};
diff --git a/src/registers/hdfgrtr_el2.rs b/src/registers/hdfgrtr_el2.rs
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: Apache-2.0 OR MIT
+//
+// Copyright (c) 2025 by the author(s)
+//
+// Author(s):
+//   - lingfuyi. <[email protected]>
+// https://developer.arm.com/documentation/ddi0601/2025-03/AArch64-Registers/HDFGRTR-EL2--Hypervisor-Debug-Fine-Grained-Read-Trap-Register?lang=en
+
+//! Hypervisor Debug Fine-Grained Read Trap Register - EL2
+//!
+//! Provides controls for traps of MRS and MRC reads of debug, trace, PMU, and Statistical Profiling
+//! System registers.
+
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+};
+
+register_bitfields! {u64,
+    pub HDFGRTR_EL2 [
+        /// Trap MRS reads of PMBIDR_EL1 at EL1 using AArch64 to EL2.
+        PMBIDR_EL1      OFFSET(63) NUMBITS(1) [],
+        /// Trap MRS reads of nPMSNEVFR_EL1 at EL1 using AArch64 to EL2.
+        nPMSNEVFR_EL1   OFFSET(62) NUMBITS(1) [],
+        /// Trap MRS reads of nBRBDATA at EL1 using AArch64 to EL2.
+        nBRBDATA        OFFSET(61) NUMBITS(1) [],
+        /// Trap MRS reads of nBRBCTL at EL1 using AArch64 to EL2.
+        nBRBCTL         OFFSET(60) NUMBITS(1) [],
+        /// Trap MRS reads of nBRBIDR at EL1 using AArch64 to EL2.
+        nBRBIDR         OFFSET(59) NUMBITS(1) [],
+        /// Trap MRS reads of PMCEIDn_EL0 at EL1 using AArch64 to EL2.
+        PMCEIDn_EL0     OFFSET(58) NUMBITS(1) [],
+        /// Trap MRS reads of PMUSERENR_EL0 at EL1 using AArch64 to EL2.
+        PMUSERENR_EL0   OFFSET(57) NUMBITS(1) [],
+        /// Trap MRS reads of TRBTRG_EL1 at EL1 using AArch64 to EL2.
+        TRBTRG_EL1      OFFSET(56) NUMBITS(1) [],
+        /// Trap MRS reads of TRBSR_EL1 at EL1 using AArch64 to EL2.
+        TRBSR_EL1       OFFSET(55) NUMBITS(1) [],
+        /// Trap MRS reads of TRBPTR_EL1 at EL1 using AArch64 to EL2.
+        TRBPTR_EL1      OFFSET(54) NUMBITS(1) [],
+        /// Trap MRS reads of TRBMAR_EL1 at EL1 using AArch64 to EL2.
+        TRBMAR_EL1      OFFSET(53) NUMBITS(1) [],
+        /// Trap MRS reads of TRBLIMITR_EL1 at EL1 using AArch64 to EL2.
+        TRBLIMITR_EL1   OFFSET(52) NUMBITS(1) [],
+        /// Trap MRS reads of TRBIDR_EL1 at EL1 using AArch64 to EL2.
+        TRBIDR_EL1      OFFSET(51) NUMBITS(1) [],
+        /// Trap MRS reads of TRBBASER_EL1 at EL1 using AArch64 to EL2.
+        TRBBASER_EL1    OFFSET(50) NUMBITS(1) [],
+        // 49: RES0, 保留位，写0
+        /// Trap MRS reads of TRCVICTLR at EL1 using AArch64 to EL2.
+        TRCVICTLR       OFFSET(48) NUMBITS(1) [],
+        /// Trap MRS reads of TRCSTATR at EL1 using AArch64 to EL2.
+        TRCSTATR        OFFSET(47) NUMBITS(1) [],
+        /// Trap MRS reads of TRCSSCSRn at EL1 using AArch64 to EL2.
+        TRCSSCSRn       OFFSET(46) NUMBITS(1) [],
+        /// Trap MRS reads of TRCSEQSTR at EL1 using AArch64 to EL2.
+        TRCSEQSTR       OFFSET(45) NUMBITS(1) [],
+        /// Trap MRS reads of TRCPRGCTLR at EL1 using AArch64 to EL2.
+        TRCPRGCTLR      OFFSET(44) NUMBITS(1) [],
+        /// Trap MRS reads of TRCOSLSR at EL1 using AArch64 to EL2.
+        TRCOSLSR        OFFSET(43) NUMBITS(1) [],
+        // 42: RES0, 保留位，写0
+        /// Trap MRS reads of TRCIMSPECn at EL1 using AArch64 to EL2.
+        TRCIMSPECn      OFFSET(41) NUMBITS(1) [],
+        /// Trap MRS reads of TRCID at EL1 using AArch64 to EL2.
+        TRCID           OFFSET(40) NUMBITS(1) [],
+        // 39-38: RES0, 保留位，写0
+        /// Trap MRS reads of TRCCNTVRn at EL1 using AArch64 to EL2.
+        TRCCNTVRn       OFFSET(37) NUMBITS(1) [],
+        /// Trap MRS reads of TRCCLAIM at EL1 using AArch64 to EL2.
+        TRCCLAIM        OFFSET(36) NUMBITS(1) [],
+        /// Trap MRS reads of TRCAUXCTLR at EL1 using AArch64 to EL2.
+        TRCAUXCTLR      OFFSET(35) NUMBITS(1) [],
+        /// Trap MRS reads of TRCAUTHSTATUS at EL1 using AArch64 to EL2.
+        TRCAUTHSTATUS   OFFSET(34) NUMBITS(1) [],
+        /// Trap MRS reads of TRC at EL1 using AArch64 to EL2.
+        TRC             OFFSET(33) NUMBITS(1) [],
+        /// Trap MRS reads of PMSLATFR_EL1 at EL1 using AArch64 to EL2.
+        PMSLATFR_EL1    OFFSET(32) NUMBITS(1) [],
+        /// Trap MRS reads of PMSIRR_EL1 at EL1 using AArch64 to EL2.
+        PMSIRR_EL1      OFFSET(31) NUMBITS(1) [],
+        /// Trap MRS reads of PMSIDR_EL1 at EL1 using AArch64 to EL2.
+        PMSIDR_EL1      OFFSET(30) NUMBITS(1) [],
+        /// Trap MRS reads of PMSICR_EL1 at EL1 using AArch64 to EL2.
+        PMSICR_EL1      OFFSET(29) NUMBITS(1) [],
+        /// Trap MRS reads of PMSFCR_EL1 at EL1 using AArch64 to EL2.
+        PMSFCR_EL1      OFFSET(28) NUMBITS(1) [],
+        /// Trap MRS reads of PMSEVFR_EL1 at EL1 using AArch64 to EL2.
+        PMSEVFR_EL1     OFFSET(27) NUMBITS(1) [],
+        /// Trap MRS reads of PMSCR_EL1 at EL1 using AArch64 to EL2.
+        PMSCR_EL1       OFFSET(26) NUMBITS(1) [],
+        /// Trap MRS reads of PMBSR_EL1 at EL1 using AArch64 to EL2.
+        PMBSR_EL1       OFFSET(25) NUMBITS(1) [],
+        /// Trap MRS reads of PMBPTR_EL1 at EL1 using AArch64 to EL2.
+        PMBPTR_EL1      OFFSET(24) NUMBITS(1) [],
+        /// Trap MRS reads of PMBLIMITR_EL1 at EL1 using AArch64 to EL2.
+        PMBLIMITR_EL1   OFFSET(23) NUMBITS(1) [],
+        /// Trap MRS reads of PMMIR_EL1 at EL1 using AArch64 to EL2.
+        PMMIR_EL1       OFFSET(22) NUMBITS(1) [],
+        // 21-20: RES0, 保留位，写0
+        /// Trap MRS reads of PMSELR_EL0 at EL1 using AArch64 to EL2.
+        PMSELR_EL0      OFFSET(19) NUMBITS(1) [],
+        /// Trap MRS reads of PMOVS at EL1 using AArch64 to EL2.
+        PMOVS           OFFSET(18) NUMBITS(1) [],
+        /// Trap MRS reads of PMINTEN at EL1 using AArch64 to EL2.
+        PMINTEN         OFFSET(17) NUMBITS(1) [],
+        /// Trap MRS reads of PMCNTEN at EL1 using AArch64 to EL2.
+        PMCNTEN         OFFSET(16) NUMBITS(1) [],
+        /// Trap MRS reads of PMCCNTR_EL0 at EL1 using AArch64 to EL2.
+        PMCCNTR_EL0     OFFSET(15) NUMBITS(1) [],
+        /// Trap MRS reads of PMCCFILTR_EL0 at EL1 using AArch64 to EL2.
+        PMCCFILTR_EL0   OFFSET(14) NUMBITS(1) [],
+        /// Trap MRS reads of PMEVTYPERn_EL0 at EL1 using AArch64 to EL2.
+        PMEVTYPERn_EL0  OFFSET(13) NUMBITS(1) [],
+        /// Trap MRS reads of PMEVCNTRn_EL0 at EL1 using AArch64 to EL2.
+        PMEVCNTRn_EL0   OFFSET(12) NUMBITS(1) [],
+        /// Trap MRS reads of OSDLR_EL1 at EL1 using AArch64 to EL2.
+        OSDLR_EL1       OFFSET(11) NUMBITS(1) [],
+        /// Trap MRS reads of OSECCR_EL1 at EL1 using AArch64 to EL2.
+        OSECCR_EL1      OFFSET(10) NUMBITS(1) [],
+        /// Trap MRS reads of OSLSR_EL1 at EL1 using AArch64 to EL2.
+        OSLSR_EL1       OFFSET(9) NUMBITS(1) [],
+        // 8: RES0, 保留位，写0
+        /// Trap MRS reads of DBGPRCR_EL1 at EL1 using AArch64 to EL2.
+        DBGPRCR_EL1     OFFSET(7) NUMBITS(1) [],
+        /// Trap MRS reads of DBGAUTHSTATUS_EL1 at EL1 using AArch64 to EL2.
+        DBGAUTHSTATUS_EL1 OFFSET(6) NUMBITS(1) [],
+        /// Trap MRS reads of DBGCLAIM at EL1 using AArch64 to EL2.
+        DBGCLAIM        OFFSET(5) NUMBITS(1) [],
+        /// Trap MRS reads of MDSCR_EL1 at EL1 using AArch64 to EL2.
+        MDSCR_EL1       OFFSET(4) NUMBITS(1) [],
+        /// Trap MRS reads of DBGWVRn_EL1 at EL1 using AArch64 to EL2.
+        DBGWVRn_EL1     OFFSET(3) NUMBITS(1) [],
+        /// Trap MRS reads of DBGWCRn_EL1 at EL1 using AArch64 to EL2.
+        DBGWCRn_EL1     OFFSET(2) NUMBITS(1) [],
+        /// Trap MRS reads of DBGBVRn_EL1 at EL1 using AArch64 to EL2.
+        DBGBVRn_EL1     OFFSET(1) NUMBITS(1) [],
+        /// Trap MRS reads of DBGBCRn_EL1 at EL1 using AArch64 to EL2.
+        DBGBCRn_EL1     OFFSET(0) NUMBITS(1) [],
+    ]
+}
+
+pub struct Reg;
+
+impl Readable for Reg {
+    type T = u64;
+    type R = HDFGRTR_EL2::Register;
+
+    sys_coproc_read_raw!(u64, "S3_4_C3_C1_4", "x");
+}
+
+impl Writeable for Reg {
+    type T = u64;
+    type R = HDFGRTR_EL2::Register;
+
+    sys_coproc_write_raw!(u64, "S3_4_C3_C1_4", "x");
+}
+
+pub const HDFGRTR_EL2: Reg = Reg {};