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peripheral: "safer" API like the one svd2rust generates? #7
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I'm OK with having bitmasks available as const to start off with. I've sometimes wondered (when writing C) if a stronger type system would help ensure I only use the correct bitmasks with the correct registers. Perhaps newtype and judicious use of the Ops traits could achieve that. But would |
Do you know if we can get the bitmasks from somewhere like a SVD file? Extracting them manually from the reference manual sounds pretty boring. I personally consider |
Briefly: Humm, I don't know. It really is. I was probably thinking of a scenario where I knew the bits in the field On 1 Nov 2016 22:19, "Jorge Aparicio" [email protected] wrote:
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I've been curious about this for some time. Frustratingly and bafflingly this appears to have never been published, neither by ARM nor by any other vendor, they all write the core support code manually. Someone did do the legwork and assemble all the system control registers in a machine-readable format (see this) but unfortunately it's not really easily convertible to SVD because there is no equivalent of the |
Well, and there's always the option of extracting them from the CMSIS headers with the help of a few regexps. |
To my surprise, I just discovered that this is not the case. The register definitions for TM4C that I've been converting include registers and fields of NVIC, MPU, FPU, DBG and SYST (confusingly, all grouped under "NVIC"), in other words, the entire So we have those in SVD format, see https://github.com/m-labs/dslite2svd/blob/9ab114affd1b82938b882459a4ed0c09d97e430e/svd/tm4c129x.xml (at the very end of the file). It's not obvious that all of them should be used, or used as-is (the NVIC registers are not declared as arrays, limiting their usefulness) but I think that's an excellent starting point. |
There are SVD files in the CMSIS 5 repository: https://github.com/ARM-software/CMSIS_5/tree/develop/Device/ARM/SVD They seem rather incomplete, though. |
These are basically useless, I don't know why ARM even publishes them. |
There is also some discussion about this over in rust-embedded/wg#46. |
An update: |
Mark .debug_gdb_scripts as non-allocatable
right now you can write any
u32
in the peripherals' registers. This is bad because you may write1
s to reserved bits that are supposed to always be set to0
.svd2rust generates a "safer" API that prevents this kind of problem. But it generates the API from SVD files and I don't if there are SVD files for these core peripherals.
Should we manually implement an API like that? Or, perhaps, should we be more conservative and just provide bit masks (as
const
s -- thinkconst SCB_CPACR_CP10: u32 = 0b11 << 20
) to begin with? (the bit masks would save you the trouble of having to look into the documentation for the right bit offset of each bit field but they are not fool proof as you can still write to reserved bits)cc @thejpster
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