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bors[bot]burrbull
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Merge #447
447: update svd parser r=therealprof a=burrbull Co-authored-by: Andrey Zgarbul <[email protected]>
2 parents ab2c67f + 1d4a935 commit 5f8c24e

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8 files changed

+30
-121
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8 files changed

+30
-121
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.github/bors.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ status = [
1515
"ci-linux (stable, Spansion, x86_64-unknown-linux-gnu, linux)",
1616
"ci-linux (stable, STMicro, x86_64-unknown-linux-gnu, linux)",
1717
"ci-linux (stable, Toshiba, x86_64-unknown-linux-gnu, linux)",
18-
"ci-linux (1.37.0, Nordic, x86_64-unknown-linux-gnu, linux)",
18+
"ci-linux (1.40.0, Nordic, x86_64-unknown-linux-gnu, linux)",
1919
"ci-linux (stable, x86_64-apple-darwin, osx)",
2020
"ci-linux (stable, x86_64-pc-windows-msvc, windows)",
2121
]

.github/workflows/ci.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ jobs:
2525

2626
include:
2727
# Test MSRV
28-
- rust: 1.37.0
28+
- rust: 1.40.0
2929
VENDOR: Nordic
3030
TARGET: x86_64-unknown-linux-gnu
3131
TRAVIS_OS_NAME: linux

Cargo.toml

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -39,13 +39,16 @@ inflections = "1.1"
3939
log = { version = "~0.4", features = ["std"] }
4040
quote = "1.0"
4141
proc-macro2 = "1.0"
42-
anyhow = "1.0.19"
43-
thiserror = "1.0.5"
42+
anyhow = "1.0"
43+
thiserror = "1.0"
4444

4545
[dependencies.svd-parser]
46-
version = "0.9"
46+
version = "0.10"
4747
features = ["derive-from"]
4848

4949
[dependencies.syn]
5050
version = "1.0"
5151
features = ["full","extra-traits"]
52+
53+
[features]
54+
strict = ["svd-parser/strict"]

ci/script.sh

Lines changed: 6 additions & 93 deletions
Original file line numberDiff line numberDiff line change
@@ -419,7 +419,7 @@ main() {
419419

420420
Microchip)
421421
echo '[dependencies.bare-metal]' >> $td/Cargo.toml
422-
echo 'version = "0.2.0"' >> $td/Cargo.toml
422+
echo 'version = "1.0.0"' >> $td/Cargo.toml
423423

424424
echo '[dependencies.mips-mcu]' >> $td/Cargo.toml
425425
echo 'version = "0.1.0"' >> $td/Cargo.toml
@@ -493,13 +493,13 @@ main() {
493493
# Community-provided RISC-V SVDs
494494
RISC-V)
495495
echo '[dependencies.bare-metal]' >> $td/Cargo.toml
496-
echo 'version = "0.2.0"' >> $td/Cargo.toml
496+
echo 'version = "1.0.0"' >> $td/Cargo.toml
497497

498498
echo '[dependencies.riscv]' >> $td/Cargo.toml
499-
echo 'version = "0.5.0"' >> $td/Cargo.toml
499+
echo 'version = "0.6.0"' >> $td/Cargo.toml
500500

501501
echo '[dependencies.riscv-rt]' >> $td/Cargo.toml
502-
echo 'version = "0.6.0"' >> $td/Cargo.toml
502+
echo 'version = "0.8.0"' >> $td/Cargo.toml
503503

504504
test_svd_for_target riscv https://github.com/raw/riscv-rust/e310x/master/e310x.svd
505505
test_svd_for_target riscv https://github.com/raw/riscv-rust/k210-pac/master/k210.svd
@@ -524,97 +524,10 @@ main() {
524524

525525
Spansion)
526526
# OK
527-
test_svd MB9AF12xK
528-
test_svd MB9AF12xL
529-
test_svd MB9AF42xK
530-
test_svd MB9AF42xL
531-
test_svd MB9BF12xJ
532-
test_svd MB9BF12xS
533-
test_svd MB9BF12xT
534-
test_svd MB9BF16xx
535-
test_svd MB9BF32xS
536-
test_svd MB9BF32xT
527+
# See Fujitsu for other chips
537528
test_svd MB9BF36xx
538-
test_svd MB9BF42xS
539-
test_svd MB9BF42xT
540529
test_svd MB9BF46xx
541-
test_svd MB9BF52xS
542-
test_svd MB9BF52xT
543530
test_svd MB9BF56xx
544-
545-
# #102 regression tests
546-
# # NOTE it would take too long to test all these so we only test half
547-
# test_svd MB9AF10xN
548-
test_svd MB9AF10xR
549-
# test_svd MB9AF11xK
550-
test_svd MB9AF11xL
551-
# test_svd MB9AF11xM
552-
test_svd MB9AF11xN
553-
# test_svd MB9AF13xK
554-
test_svd MB9AF13xL
555-
# test_svd MB9AF13xM
556-
test_svd MB9AF13xN
557-
# test_svd MB9AF14xL
558-
test_svd MB9AF14xM
559-
# test_svd MB9AF14xN
560-
test_svd MB9AF15xM
561-
# test_svd MB9AF15xN
562-
test_svd MB9AF15xR
563-
# test_svd MB9AF31xK
564-
test_svd MB9AF31xL
565-
# test_svd MB9AF31xM
566-
test_svd MB9AF31xN
567-
# test_svd MB9AF34xL
568-
test_svd MB9AF34xM
569-
# test_svd MB9AF34xN
570-
test_svd MB9AFA3xL
571-
# test_svd MB9AFA3xM
572-
test_svd MB9AFA3xN
573-
# test_svd MB9AFA4xL
574-
test_svd MB9AFA4xM
575-
# test_svd MB9AFA4xN
576-
test_svd MB9AFB4xL
577-
# test_svd MB9AFB4xM
578-
test_svd MB9AFB4xN
579-
# test_svd MB9BF10xN
580-
test_svd MB9BF10xR
581-
# test_svd MB9BF11xN
582-
test_svd MB9BF11xR
583-
# test_svd MB9BF11xS
584-
test_svd MB9BF11xT
585-
# test_svd MB9BF12xK
586-
test_svd MB9BF12xL
587-
# test_svd MB9BF12xM
588-
test_svd MB9BF21xS
589-
# test_svd MB9BF21xT
590-
test_svd MB9BF30xN
591-
# test_svd MB9BF30xR
592-
test_svd MB9BF31xN
593-
# test_svd MB9BF31xR
594-
test_svd MB9BF31xS
595-
# test_svd MB9BF31xT
596-
test_svd MB9BF32xK
597-
# test_svd MB9BF32xL
598-
test_svd MB9BF32xM
599-
# test_svd MB9BF40xN
600-
test_svd MB9BF40xR
601-
# test_svd MB9BF41xN
602-
test_svd MB9BF41xR
603-
# test_svd MB9BF41xS
604-
test_svd MB9BF41xT
605-
# test_svd MB9BF50xN
606-
test_svd MB9BF50xR
607-
# test_svd MB9BF51xN
608-
test_svd MB9BF51xR
609-
# test_svd MB9BF51xS
610-
test_svd MB9BF51xT
611-
# test_svd MB9BF52xK
612-
test_svd MB9BF52xL
613-
# test_svd MB9BF52xM
614-
test_svd MB9BF61xS
615-
# test_svd MB9BF61xT
616-
test_svd MB9BFD1xS
617-
# test_svd MB9BFD1xT
618531
;;
619532

620533
STMicro)
@@ -670,7 +583,7 @@ main() {
670583

671584
Espressif)
672585
echo '[dependencies.bare-metal]' >> $td/Cargo.toml
673-
echo 'version = "0.2.0"' >> $td/Cargo.toml
586+
echo 'version = "1.0.0"' >> $td/Cargo.toml
674587

675588
echo '[dependencies.xtensa-lx]' >> $td/Cargo.toml
676589
echo 'version = "0.3.0"' >> $td/Cargo.toml

src/generate/peripheral.rs

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -426,14 +426,12 @@ impl FieldRegions {
426426
.filter(|r| {
427427
r.fields.len() > 1 && (idents.iter().filter(|ident| **ident == r.ident).count() > 1)
428428
})
429-
.inspect(|r| {
429+
.for_each(|r| {
430430
warn!(
431431
"Found type name conflict with region {:?}, renamed to {:?}",
432432
r.ident,
433433
r.shortest_ident()
434-
)
435-
})
436-
.for_each(|r| {
434+
);
437435
r.ident = r.shortest_ident();
438436
});
439437
Ok(())

src/generate/register.rs

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@ use crate::svd::{
33
RegisterProperties, Usage, WriteConstraint,
44
};
55
use cast::u64;
6+
use core::u64;
67
use log::warn;
78
use proc_macro2::{Ident, Punct, Spacing, Span, TokenStream};
89
use quote::{quote, ToTokens};
@@ -250,6 +251,7 @@ pub fn render(
250251
Ok(out)
251252
}
252253

254+
#[allow(clippy::too_many_arguments)]
253255
pub fn fields(
254256
fields: &[Field],
255257
parent: &Register,
@@ -287,7 +289,7 @@ pub fn fields(
287289
&& (f.access != Some(Access::WriteOnce));
288290
let can_write = can_write && (f.access != Some(Access::ReadOnly));
289291

290-
let mask = 1u64.wrapping_neg() >> (64 - width);
292+
let mask = u64::MAX >> (64 - width);
291293
let hexmask = &util::hex(mask);
292294
let offset = u64::from(offset);
293295
let rv = reset_value.map(|rv| (rv >> offset) & mask);
@@ -741,8 +743,7 @@ pub fn fields(
741743
fn unsafety(write_constraint: Option<&WriteConstraint>, width: u32) -> Option<Ident> {
742744
match &write_constraint {
743745
Some(&WriteConstraint::Range(range))
744-
if u64::from(range.min) == 0
745-
&& u64::from(range.max) == 1u64.wrapping_neg() >> (64 - width) =>
746+
if range.min == 0 && range.max == u64::MAX >> (64 - width) =>
746747
{
747748
// the SVD has acknowledged that it's safe to write
748749
// any value that can fit in the field
@@ -1044,8 +1045,7 @@ fn lookup_in_peripheral<'p>(
10441045
if let Some(register) = all_registers.iter().find(|r| r.name == base_register) {
10451046
if let Some(field) = register
10461047
.fields
1047-
.as_ref()
1048-
.map(|fs| &**fs)
1048+
.as_deref()
10491049
.unwrap_or(&[])
10501050
.iter()
10511051
.find(|f| f.name == base_field)
@@ -1074,7 +1074,7 @@ fn lookup_in_field<'f>(
10741074
field: &'f Field,
10751075
) -> Result<(&'f EnumeratedValues, Option<Base<'f>>)> {
10761076
for evs in &field.enumerated_values {
1077-
if evs.name.as_ref().map(|s| &**s) == Some(base_evs) {
1077+
if evs.name.as_deref() == Some(base_evs) {
10781078
return Ok((
10791079
evs,
10801080
Some(Base {
@@ -1099,11 +1099,11 @@ fn lookup_in_register<'r>(
10991099
) -> Result<(&'r EnumeratedValues, Option<Base<'r>>)> {
11001100
let mut matches = vec![];
11011101

1102-
for f in register.fields.as_ref().map(|v| &**v).unwrap_or(&[]) {
1102+
for f in register.fields.as_deref().unwrap_or(&[]) {
11031103
if let Some(evs) = f
11041104
.enumerated_values
11051105
.iter()
1106-
.find(|evs| evs.name.as_ref().map(|s| &**s) == Some(base_evs))
1106+
.find(|evs| evs.name.as_deref() == Some(base_evs))
11071107
{
11081108
matches.push((evs, &f.name))
11091109
}
@@ -1160,7 +1160,7 @@ fn lookup_in_peripherals<'p>(
11601160
}
11611161
}
11621162

1163-
fn periph_all_registers<'a>(p: &'a Peripheral) -> Vec<&'a Register> {
1163+
fn periph_all_registers(p: &Peripheral) -> Vec<&Register> {
11641164
let mut par: Vec<&Register> = Vec::new();
11651165
let mut rem: Vec<&RegisterCluster> = Vec::new();
11661166
if p.registers.is_none() {

src/lib.rs

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -484,20 +484,16 @@ mod util;
484484

485485
pub use crate::util::Target;
486486

487+
#[non_exhaustive]
487488
pub struct Generation {
488489
pub lib_rs: String,
489490
pub device_specific: Option<DeviceSpecific>,
490-
491-
// Reserve the right to add more fields to this struct
492-
_extensible: (),
493491
}
494492

493+
#[non_exhaustive]
495494
pub struct DeviceSpecific {
496495
pub device_x: String,
497496
pub build_rs: String,
498-
499-
// Reserve the right to add more fields to this struct
500-
_extensible: (),
501497
}
502498

503499
use anyhow::Result;
@@ -534,14 +530,12 @@ pub fn generate(xml: &str, target: Target, nightly: bool) -> Result<Generation>
534530
Some(DeviceSpecific {
535531
device_x,
536532
build_rs: util::build_rs().to_string(),
537-
_extensible: (),
538533
})
539534
};
540535

541536
Ok(Generation {
542537
lib_rs,
543538
device_specific,
544-
_extensible: (),
545539
})
546540
}
547541

src/util.rs

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ pub const BITS_PER_BYTE: u32 = 8;
1313
/// that are not valid in Rust ident
1414
const BLACKLIST_CHARS: &[char] = &['(', ')', '[', ']', '/', ' ', '-'];
1515

16+
#[allow(non_camel_case_types)]
1617
#[derive(Clone, Copy, PartialEq)]
1718
pub enum Target {
1819
CortexM,
@@ -166,7 +167,7 @@ pub fn respace(s: &str) -> String {
166167
pub fn escape_brackets(s: &str) -> String {
167168
s.split('[')
168169
.fold("".to_string(), |acc, x| {
169-
if acc == "" {
170+
if acc.is_empty() {
170171
x.to_string()
171172
} else if acc.ends_with('\\') {
172173
acc + "[" + x
@@ -176,7 +177,7 @@ pub fn escape_brackets(s: &str) -> String {
176177
})
177178
.split(']')
178179
.fold("".to_string(), |acc, x| {
179-
if acc == "" {
180+
if acc.is_empty() {
180181
x.to_string()
181182
} else if acc.ends_with('\\') {
182183
acc + "]" + x

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