Skip to content

Enable RISC-V atomic compare and swap #56564

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom
Closed
fintelia opened this issue Dec 6, 2018 · 2 comments
Closed

Enable RISC-V atomic compare and swap #56564

fintelia opened this issue Dec 6, 2018 · 2 comments
Labels
A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.

Comments

@fintelia
Copy link
Contributor

fintelia commented Dec 6, 2018

Now that LLVM has support for atomic CAS on RISC-V it would be good to enable it in rustc for that backend. I think this should just be a matter of updating LLVM (or cherry picking the relevant commit? Not entirely sure how that works) and then flipping the switch.
@nikic nikic added the A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. label Dec 6, 2018
@fintelia
Copy link
Contributor Author

What is necessary to move this along?

@nikic
Copy link
Contributor

nikic commented Jan 11, 2019

@fintelia There will be an LLVM update soon (as part of the LLVM monorepo migration), which will pull in the necessary LLVM changes. Afterwards it can be enabled on the rustc side.

@fintelia fintelia mentioned this issue Jan 26, 2019
Merged
Centril added a commit to Centril/rust that referenced this issue Jan 27, 2019
@Centril
Rollup merge of rust-lang#57925 - fintelia:riscv-cas, r=nagisa
b3dbeee 
Enable RISC-V atomic compare and swap

Fixes rust-lang#56564
bors added a commit that referenced this issue Jan 27, 2019
@bors
Auto merge of #57925 - fintelia:riscv-cas, r=nagisa
677064b 
Enable RISC-V atomic compare and swap

Fixes #56564
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Assignees
No one assigned
Labels
A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.
Projects
None yet
Milestone
No milestone
Development

No branches or pull requests
2 participants
@nikic @fintelia