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Dec 7, 2021
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3 changes: 3 additions & 0 deletions compiler/rustc_codegen_gcc/src/asm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -577,6 +577,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4) => unimplemented!(),
InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg) => unimplemented!(),
InlineAsmRegClass::Avr(_) => unimplemented!(),
InlineAsmRegClass::Bpf(_) => unimplemented!(),
InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => unimplemented!(),
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => unimplemented!(),
Expand Down Expand Up @@ -639,6 +640,7 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4) => {
unimplemented!()
}
InlineAsmRegClass::Avr(_) => unimplemented!(),
InlineAsmRegClass::Bpf(_) => unimplemented!(),
InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => cx.type_i32(),
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(),
Expand Down Expand Up @@ -747,6 +749,7 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option
| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg_low4) => {
unimplemented!()
}
InlineAsmRegClass::Avr(_) => unimplemented!(),
InlineAsmRegClass::Bpf(_) => unimplemented!(),
InlineAsmRegClass::Hexagon(_) => unimplemented!(),
InlineAsmRegClass::Mips(_) => unimplemented!(),
Expand Down
21 changes: 21 additions & 0 deletions compiler/rustc_codegen_llvm/src/asm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -319,6 +319,9 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
"~{vxrm}".to_string(),
]);
}
InlineAsmArch::Avr => {
constraints.push("~{sreg}".to_string());
}
InlineAsmArch::Nvptx64 => {}
InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {}
InlineAsmArch::Hexagon => {}
Expand Down Expand Up @@ -669,6 +672,11 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => "r",
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_upper) => "d",
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair) => "r",
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => "w",
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => "e",
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
Expand Down Expand Up @@ -749,6 +757,14 @@ fn modifier_to_llvm(
}
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => None,
InlineAsmRegClass::Bpf(_) => None,
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair)
| InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw)
| InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => match modifier {
Some('h') => Some('B'),
Some('l') => Some('A'),
_ => None,
},
InlineAsmRegClass::Avr(_) => None,
InlineAsmRegClass::S390x(_) => None,
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
bug!("LLVM backend does not support SPIR-V")
Expand Down Expand Up @@ -812,6 +828,11 @@ fn dummy_output_type(cx: &CodegenCx<'ll, 'tcx>, reg: InlineAsmRegClass) -> &'ll
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => cx.type_i64(),
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => cx.type_i32(),
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => cx.type_i8(),
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_upper) => cx.type_i8(),
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair) => cx.type_i16(),
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => cx.type_i16(),
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => cx.type_i16(),
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(),
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
Expand Down
4 changes: 4 additions & 0 deletions compiler/rustc_span/src/symbol.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1052,8 +1052,12 @@ symbols! {
reg64,
reg_abcd,
reg_byte,
reg_iw,
reg_nonzero,
reg_pair,
reg_ptr,
reg_thumb,
reg_upper,
register_attr,
register_tool,
relaxed_adts,
Expand Down
196 changes: 196 additions & 0 deletions compiler/rustc_target/src/asm/avr.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,196 @@
use super::{InlineAsmArch, InlineAsmType};
use rustc_macros::HashStable_Generic;
use std::fmt;

def_reg_class! {
Avr AvrInlineAsmRegClass {
reg,
reg_upper,
reg_pair,
reg_iw,
reg_ptr,
}
}

impl AvrInlineAsmRegClass {
pub fn valid_modifiers(self, _arch: InlineAsmArch) -> &'static [char] {
match self {
Self::reg_pair | Self::reg_iw | Self::reg_ptr => &['h', 'l'],
_ => &[],
}
}

pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
None
}

pub fn suggest_modifier(
self,
_arch: InlineAsmArch,
_ty: InlineAsmType,
) -> Option<(char, &'static str)> {
None
}

pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> {
None
}

pub fn supported_types(
self,
_arch: InlineAsmArch,
) -> &'static [(InlineAsmType, Option<&'static str>)] {
match self {
Self::reg => types! { _: I8; },
Self::reg_upper => types! { _: I8; },
Self::reg_pair => types! { _: I16; },
Self::reg_iw => types! { _: I16; },
Self::reg_ptr => types! { _: I16; },
}
}
}

def_regs! {
Avr AvrInlineAsmReg AvrInlineAsmRegClass {
r2: reg = ["r2"],
r3: reg = ["r3"],
r4: reg = ["r4"],
r5: reg = ["r5"],
r6: reg = ["r6"],
r7: reg = ["r7"],
r8: reg = ["r8"],
r9: reg = ["r9"],
r10: reg = ["r10"],
r11: reg = ["r11"],
r12: reg = ["r12"],
r13: reg = ["r13"],
r14: reg = ["r14"],
r15: reg = ["r15"],
r16: reg, reg_upper = ["r16"],
r17: reg, reg_upper = ["r17"],
r18: reg, reg_upper = ["r18"],
r19: reg, reg_upper = ["r19"],
r20: reg, reg_upper = ["r20"],
r21: reg, reg_upper = ["r21"],
r22: reg, reg_upper = ["r22"],
r23: reg, reg_upper = ["r23"],
r24: reg, reg_upper = ["r24"],
r25: reg, reg_upper = ["r25"],
r26: reg, reg_upper = ["r26", "XL"],
r27: reg, reg_upper = ["r27", "XH"],
r30: reg, reg_upper = ["r30", "ZL"],
r31: reg, reg_upper = ["r31", "ZH"],

r3r2: reg_pair = ["r3r2"],
r5r4: reg_pair = ["r5r4"],
r7r6: reg_pair = ["r7r6"],
r9r8: reg_pair = ["r9r8"],
r11r10: reg_pair = ["r11r10"],
r13r12: reg_pair = ["r13r12"],
r15r14: reg_pair = ["r15r14"],
r17r16: reg_pair = ["r17r16"],
r19r18: reg_pair = ["r19r18"],
r21r20: reg_pair = ["r21r20"],
r23r22: reg_pair = ["r23r22"],

r25r24: reg_iw, reg_pair = ["r25r24"],

X: reg_ptr, reg_iw, reg_pair = ["r27r26", "X"],
Z: reg_ptr, reg_iw, reg_pair = ["r31r30", "Z"],

#error = ["Y", "YL", "YH"] =>
"the frame pointer cannot be used as an operand for inline asm",
#error = ["SP", "SPL", "SPH"] =>
"the stack pointer cannot be used as an operand for inline asm",
#error = ["r0", "r1", "r1r0"] =>
"r0 and r1 are not available due to an issue in LLVM",
}
}

macro_rules! emit_pairs {
(
$self:ident $modifier:ident,
$($pair:ident $name:literal $hi:literal $lo:literal,)*
) => {
match ($self, $modifier) {
$(
(AvrInlineAsmReg::$pair, Some('h')) => $hi,
(AvrInlineAsmReg::$pair, Some('l')) => $lo,
(AvrInlineAsmReg::$pair, _) => $name,
)*
_ => $self.name(),
}
};
}

impl AvrInlineAsmReg {
pub fn emit(
self,
out: &mut dyn fmt::Write,
_arch: InlineAsmArch,
modifier: Option<char>,
) -> fmt::Result {
let name = emit_pairs! {
self modifier,
Z "Z" "ZH" "ZL",
X "X" "XH" "XL",
r25r24 "r25:r24" "r25" "r24",
r23r22 "r23:r22" "r23" "r22",
r21r20 "r21:r20" "r21" "r20",
r19r18 "r19:r18" "r19" "r18",
r17r16 "r17:r16" "r17" "r16",
r15r14 "r15:r14" "r15" "r14",
r13r12 "r13:r12" "r13" "r12",
r11r10 "r11:r10" "r11" "r10",
r9r8 "r9:r8" "r9" "r8",
r7r6 "r7:r6" "r7" "r6",
r5r4 "r5:r4" "r5" "r4",
r3r2 "r3:r2" "r3" "r2",
};
out.write_str(name)
}

pub fn overlapping_regs(self, mut cb: impl FnMut(AvrInlineAsmReg)) {
cb(self);

macro_rules! reg_conflicts {
(
$(
$pair:ident : $hi:ident $lo:ident,
)*
) => {
match self {
$(
Self::$pair => {
cb(Self::$hi);
cb(Self::$lo);
}
Self::$hi => {
cb(Self::$pair);
}
Self::$lo => {
cb(Self::$pair);
}
)*
}
};
}

reg_conflicts! {
Z : r31 r30,
X : r27 r26,
r25r24 : r25 r24,
r23r22 : r23 r22,
r21r20 : r21 r20,
r19r18 : r19 r18,
r17r16 : r17 r16,
r15r14 : r15 r14,
r13r12 : r13 r12,
r11r10 : r11 r10,
r9r8 : r9 r8,
r7r6 : r7 r6,
r5r4 : r5 r4,
r3r2 : r3 r2,
}
}
}
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