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Merged
merged 2 commits into from
Aug 11, 2025
Merged

🍒 TAPI Cherrypicks #11149

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b16210b
[TextAPI] Seperate out Arch name from enum label, NFCI (#152332)
cyndyishida Aug 6, 2025
45327ee
[TextAPI] Add riscv32 as a supported arch (#152619)
cyndyishida Aug 8, 2025
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35 changes: 20 additions & 15 deletions llvm/include/llvm/TextAPI/Architecture.def
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Original file line number Diff line number Diff line change
Expand Up @@ -13,33 +13,38 @@
///
/// X86 architectures sorted by cpu type and sub type id.
///
ARCHINFO(i386, MachO::CPU_TYPE_I386, MachO::CPU_SUBTYPE_I386_ALL, 32)
ARCHINFO(x86_64, MachO::CPU_TYPE_X86_64, MachO::CPU_SUBTYPE_X86_64_ALL, 64)
ARCHINFO(x86_64h, MachO::CPU_TYPE_X86_64, MachO::CPU_SUBTYPE_X86_64_H, 64)
ARCHINFO(i386, i386, MachO::CPU_TYPE_I386, MachO::CPU_SUBTYPE_I386_ALL, 32)
ARCHINFO(x86_64, x86_64, MachO::CPU_TYPE_X86_64, MachO::CPU_SUBTYPE_X86_64_ALL, 64)
ARCHINFO(x86_64h, x86_64h, MachO::CPU_TYPE_X86_64, MachO::CPU_SUBTYPE_X86_64_H, 64)


///
/// ARM architectures sorted by cpu sub type id.
///
ARCHINFO(armv4t, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V4T, 32)
ARCHINFO(armv6, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V6, 32)
ARCHINFO(armv5, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V5TEJ, 32)
ARCHINFO(armv7, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7, 32)
ARCHINFO(armv7s, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7S, 32)
ARCHINFO(armv7k, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7K, 32)
ARCHINFO(armv6m, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V6M, 32)
ARCHINFO(armv7m, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7M, 32)
ARCHINFO(armv7em, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7EM, 32)
ARCHINFO(armv4t, armv4t, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V4T, 32)
ARCHINFO(armv6, armv6, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V6, 32)
ARCHINFO(armv5, armv5, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V5TEJ, 32)
ARCHINFO(armv7, armv7, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7, 32)
ARCHINFO(armv7s, armv7s, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7S, 32)
ARCHINFO(armv7k, armv7k, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7K, 32)
ARCHINFO(armv6m, armv6m, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V6M, 32)
ARCHINFO(armv7m, armv7m, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7M, 32)
ARCHINFO(armv7em, armv7em, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7EM, 32)


///
/// ARM64 architectures sorted by cpu sub type id.
///
ARCHINFO(arm64, MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64_ALL, 64)
ARCHINFO(arm64e, MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64E, 64)
ARCHINFO(arm64, arm64, MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64_ALL, 64)
ARCHINFO(arm64e, arm64e, MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64E, 64)


///
/// ARM64_32 architectures sorted by cpu sub type id
///
ARCHINFO(arm64_32, MachO::CPU_TYPE_ARM64_32, MachO::CPU_SUBTYPE_ARM64_32_V8, 32)
ARCHINFO(arm64_32, arm64_32, MachO::CPU_TYPE_ARM64_32, MachO::CPU_SUBTYPE_ARM64_32_V8, 32)

///
/// RISCV32 architectures sorted by cpu sub type id
///
ARCHINFO(riscv32, riscv32, MachO::CPU_TYPE_RISCV, MachO::CPU_SUBTYPE_RISCV_ALL, 32)
2 changes: 1 addition & 1 deletion llvm/include/llvm/TextAPI/Architecture.h
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Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@ namespace MachO {

/// Defines the architecture slices that are supported by Text-based Stub files.
enum Architecture : uint8_t {
#define ARCHINFO(Arch, Type, SubType, NumBits) AK_##Arch,
#define ARCHINFO(Arch, Name, Type, SubType, NumBits) AK_##Arch,
#include "llvm/TextAPI/Architecture.def"
#undef ARCHINFO
AK_unknown, // this has to go last.
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12 changes: 6 additions & 6 deletions llvm/lib/TextAPI/Architecture.cpp
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Expand Up @@ -21,7 +21,7 @@ namespace llvm {
namespace MachO {

Architecture getArchitectureFromCpuType(uint32_t CPUType, uint32_t CPUSubType) {
#define ARCHINFO(Arch, Type, Subtype, NumBits) \
#define ARCHINFO(Arch, Name, Type, Subtype, NumBits) \
if (CPUType == (Type) && \
(CPUSubType & ~MachO::CPU_SUBTYPE_MASK) == (Subtype)) \
return AK_##Arch;
Expand All @@ -33,17 +33,17 @@ Architecture getArchitectureFromCpuType(uint32_t CPUType, uint32_t CPUSubType) {

Architecture getArchitectureFromName(StringRef Name) {
return StringSwitch<Architecture>(Name)
#define ARCHINFO(Arch, Type, Subtype, NumBits) .Case(#Arch, AK_##Arch)
#define ARCHINFO(Arch, Name, Type, Subtype, NumBits) .Case(#Name, AK_##Arch)
#include "llvm/TextAPI/Architecture.def"
#undef ARCHINFO
.Default(AK_unknown);
}

StringRef getArchitectureName(Architecture Arch) {
switch (Arch) {
#define ARCHINFO(Arch, Type, Subtype, NumBits) \
#define ARCHINFO(Arch, Name, Type, Subtype, NumBits) \
case AK_##Arch: \
return #Arch;
return #Name;
#include "llvm/TextAPI/Architecture.def"
#undef ARCHINFO
case AK_unknown:
Expand All @@ -57,7 +57,7 @@ StringRef getArchitectureName(Architecture Arch) {

std::pair<uint32_t, uint32_t> getCPUTypeFromArchitecture(Architecture Arch) {
switch (Arch) {
#define ARCHINFO(Arch, Type, Subtype, NumBits) \
#define ARCHINFO(Arch, Name, Type, Subtype, NumBits) \
case AK_##Arch: \
return std::make_pair(Type, Subtype);
#include "llvm/TextAPI/Architecture.def"
Expand All @@ -77,7 +77,7 @@ Architecture mapToArchitecture(const Triple &Target) {

bool is64Bit(Architecture Arch) {
switch (Arch) {
#define ARCHINFO(Arch, Type, Subtype, NumBits) \
#define ARCHINFO(Arch, Name, Type, Subtype, NumBits) \
case AK_##Arch: \
return NumBits == 64;
#include "llvm/TextAPI/Architecture.def"
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2 changes: 1 addition & 1 deletion llvm/lib/TextAPI/TextStubCommon.cpp
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Expand Up @@ -133,7 +133,7 @@ QuotingType ScalarTraits<PlatformSet>::mustQuote(StringRef) {

void ScalarBitSetTraits<ArchitectureSet>::bitset(IO &IO,
ArchitectureSet &Archs) {
#define ARCHINFO(arch, type, subtype, numbits) \
#define ARCHINFO(arch, name, type, subtype, numbits) \
IO.bitSetCase(Archs, #arch, 1U << static_cast<int>(AK_##arch));
#include "llvm/TextAPI/Architecture.def"
#undef ARCHINFO
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27 changes: 27 additions & 0 deletions llvm/unittests/TextAPI/TextStubV5Tests.cpp
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Expand Up @@ -1167,6 +1167,33 @@ TEST(TBDv5, InvalidMinOS) {
EXPECT_EQ("invalid min_deployment section\n", ErrorMessage);
}

TEST(TBDv5, RISCV) {
static const char TBDv5File[] = R"({
"tapi_tbd_version": 5,
"main_library": {
"target_info": [
{
"target": "riscv32-ios",
"min_deployment": "34.1"
}
],
"install_names":[
{ "name":"/S/L/F/Foo.framework/Foo" }
]
}})";

Expected<TBDFile> Result =
TextAPIReader::get(MemoryBufferRef(TBDv5File, "Test.tbd"));
EXPECT_TRUE(!!Result);
Target ExpectedTarget = Target(AK_riscv32, PLATFORM_IOS, VersionTuple(34, 1));
TBDFile ReadFile = std::move(Result.get());
EXPECT_EQ(FileType::TBD_V5, ReadFile->getFileType());
EXPECT_EQ(std::string("/S/L/F/Foo.framework/Foo"),
ReadFile->getInstallName());
EXPECT_TRUE(ReadFile->targets().begin() != ReadFile->targets().end());
EXPECT_EQ(*ReadFile->targets().begin(), ExpectedTarget);
}

TEST(TBDv5, SimSupport) {
static const char TBDv5File[] = R"({
"tapi_tbd_version": 5,
Expand Down