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@taiki-e taiki-e commented Oct 31, 2024

  • Add per-line pseudo code style code comments to almost all inline assemblies.
    Hopefully this will make the code easier to understand for people who are not familiar with assembly.
    For example:

    $release, // fence
    "2:", // 'retry:
    concat!("l", $suffix, "arx {out}, 0, {dst}"), // atomic { RESERVE = (dst, size_of($int_type)); out = *dst }
    concat!("st", $suffix, "cx. {val}, 0, {dst}"), // atomic { if RESERVE == (dst, size_of($int_type)) { *dst = val; cr0.EQ = 1 } else { cr0.EQ = 0 }; RESERVE = None }
    "bne %cr0, 2b", // if cr0.EQ == 0 { jump 'retry }
    $acquire, // fence

  • Add module-level comments to some architectures describing the types of atomic instructions provided by that architecture. I plan to add this for other architectures in the future.

    UPDATE: this now extended to more architectures as "Atomic operation overview by architecture". See the linked docs for more.

  • Clean up suboptimal or redundant code found during the above process.

  • Add links to generated assemblies for tier 3 targets.

@taiki-e taiki-e added O-arm Target: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 state O-riscv Target: RISC-V architecture O-x86 Target: x86/x64 processors O-mips Target: MIPS processors O-powerpc Target: PowerPC processors O-s390x Target: SystemZ processors (s390x) O-loongarch Target: LoongArch O-hexagon Target: Qualcomm Hexagon O-avr Target: AVR O-msp430 Target: MSP430 O-aarch64 Target: Armv8-A, Armv8-R, or later processors in AArch64 mode O-xtensa Target: Xtensa processors O-m68k Target: Motorola 68000 series labels Oct 31, 2024
- Add per-line pseudo code style code comments to almost all inline
  assemblies.
  Hopefully this will make the code easier to understand for people who
  are not familiar with assembly.
- Add module-level comments to some architectures describing the types
  of atomic instructions provided by that architecture. I plan to add
  this for other architectures in the future.
- Clean up suboptimal or redundant code found during the above process.
- Add links to generated assemblies for tier 3 targets.
@taiki-e taiki-e merged commit af791f8 into main Oct 31, 2024
108 checks passed
@taiki-e taiki-e deleted the cleanup branch October 31, 2024 19:23
taiki-e added a commit that referenced this pull request Nov 18, 2024
taiki-e added a commit that referenced this pull request Nov 18, 2024
taiki-e added a commit that referenced this pull request Nov 18, 2024
taiki-e added a commit that referenced this pull request Nov 18, 2024
taiki-e added a commit that referenced this pull request Nov 18, 2024
taiki-e added a commit that referenced this pull request Nov 18, 2024
taiki-e added a commit that referenced this pull request Nov 18, 2024
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O-aarch64 Target: Armv8-A, Armv8-R, or later processors in AArch64 mode O-arm Target: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 state O-avr Target: AVR O-hexagon Target: Qualcomm Hexagon O-loongarch Target: LoongArch O-m68k Target: Motorola 68000 series O-mips Target: MIPS processors O-msp430 Target: MSP430 O-powerpc Target: PowerPC processors O-riscv Target: RISC-V architecture O-s390x Target: SystemZ processors (s390x) O-x86 Target: x86/x64 processors O-xtensa Target: Xtensa processors

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