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UC Berkeley Architecture Research

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  1. chipyard chipyard Public

    An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

    Scala 1.9k 739

  2. chiseltest chiseltest Public archive

    The batteries-included testing and formal verification library for Chisel-based RTL designs.

    Scala 234 76

  3. dsptools dsptools Public

    A Library of Chisel3 Tools for Digital Signal Processing

    Scala 239 40

  4. chisel-tutorial chisel-tutorial Public

    chisel tutorial exercises and answers

    Scala 739 201

Repositories

Showing 10 of 200 repositories
  • zephyr-chipyard-sw Public
    ucb-bar/zephyr-chipyard-sw’s past year of commit activity
    0 1 0 0 Updated Aug 22, 2025
  • Accelerated-TinyMPC Public Forked from TinyMPC/TinyMPC

    Model-predictive control for microcontrollers (fork mapping tinyMPC to gemmini or other HW accelerators)

    ucb-bar/Accelerated-TinyMPC’s past year of commit activity
    C++ 7 MIT 111 0 0 Updated Aug 22, 2025
  • radiance Public
    ucb-bar/radiance’s past year of commit activity
    Scala 5 1 0 0 Updated Aug 20, 2025
  • constellation Public

    A Chisel RTL generator for network-on-chip interconnects

    ucb-bar/constellation’s past year of commit activity
    Scala 207 BSD-3-Clause 33 22 4 Updated Aug 19, 2025
  • chipyard Public

    An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

    ucb-bar/chipyard’s past year of commit activity
    Scala 1,938 BSD-3-Clause 739 150 (3 issues need help) 25 Updated Aug 19, 2025
  • zephyr Public Forked from zephyrproject-rtos/zephyr

    Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.

    ucb-bar/zephyr’s past year of commit activity
    C 0 Apache-2.0 7,855 0 0 Updated Aug 14, 2025
  • autocomp Public
    ucb-bar/autocomp’s past year of commit activity
    Python 9 BSD-3-Clause 0 0 0 Updated Aug 11, 2025
  • Baremetal-NN Public

    Tool for converting PyTorch models into raw C codes with minimal dependency and some performance optimizations.

    ucb-bar/Baremetal-NN’s past year of commit activity
    C 34 MIT 6 4 0 Updated Aug 10, 2025
  • stac-top Public

    The SRAM timing analysis chip for verifying SRAMs generated by SRAM22

    ucb-bar/stac-top’s past year of commit activity
    Scala 7 BSD-3-Clause 0 0 0 Updated Jul 31, 2025
  • IsaacLab Public Forked from isaac-sim/IsaacLab

    Unified framework for robot learning built on NVIDIA Isaac Sim

    ucb-bar/IsaacLab’s past year of commit activity
    Python 0 BSD-3-Clause 2,209 0 0 Updated Jul 30, 2025
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