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SoC: Intel: ADSP: enable instruction cache #92175
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All intel_adsp architectures have instruction cache. Selecting CPU_HAS_ICACHE fixes gdb memory writing problems. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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Ack - it does indeed have I$
@dcpleung @peter-mitsis fyi.
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What was this breaking, out of curiosity?
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I'm surprised that it wasn't active. I thought we have a piece of code executing from the cache while we memory is already turned...
@andyross gdb, because zephyr/arch/xtensa/core/gdbstub.c Line 1001 in cf0f00d
Lines 1051 to 1053 in cf0f00d
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@softwarecki not sure if this is your question - but icache is indeed currently active and used on Intel ADSPs with SOF, we just failed to enable this Kconfig option |
All intel_adsp architectures have instruction cache. Selecting CPU_HAS_ICACHE fixes gdb memory writing problems.