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andrewrk opened this issue Sep 20, 2019 · 6 comments
Open

compiler rt function muldi3 / mulsi3 are incorrectly generated with mutual recursion #3275

andrewrk opened this issue Sep 20, 2019 · 6 comments
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arch-riscv 32-bit and 64-bit RISC-V bug Observed behavior contradicts documented or intended behavior compiler-rt contributor friendly This issue is limited in scope and/or knowledge of Zig internals.
Milestone
0.15.0

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@andrewrk
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andrewrk commented Sep 20, 2019 •
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To reproduce:

zig test -target riscv64-linux-none --override-std-dir ../std ../std/special/compiler_rt/muldi3.zig --output-dir ./
qemu-riscv64 ./test

output: Segmentation fault (core dumped)

with gdb

qemu-riscv64 -g 9000 ./test 
# in a separate terminal
gdb ./test -ex 'target remote localhost:9000'

Backtrace shows:

#12202 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12203 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12204 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12205 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12206 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12207 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12208 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12209 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12210 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12211 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12212 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12213 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12214 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12215 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12216 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12217 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12218 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12219 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12220 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12221 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12222 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47
#12223 0x00000000004e0004 in compiler_rt.muldi3.__muldsi3 (a=0x0, b=0x0) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:27
#12224 0x00000000004c2f64 in compiler_rt.muldi3.__muldi3 (a=0x0, b=0x38) at /home/lemonboy/code/zig/std/special/compiler_rt/muldi3.zig:47

It's unclear whether this is an upstream issue or not. The next step is to try to produce a reduction to demonstrate an LLVM bug. #3275 (comment)

Reported by @LemonBoy #3260 (review)
@andrewrk andrewrk added bug Observed behavior contradicts documented or intended behavior arch-riscv 32-bit and 64-bit RISC-V labels Sep 20, 2019
@andrewrk andrewrk added this to the 0.6.0 milestone Sep 20, 2019
@andrewrk
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Reported upstream: https://bugs.llvm.org/show_bug.cgi?id=43388

@andrewrk andrewrk added the upstream An issue with a third party project that Zig uses. label Sep 20, 2019
@andrewrk
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I believe this is related to #2051. Currently when you specify riscv64, this is "baseline" which does not have certain useful features, such as:

  • atomics
  • 64 bit integer multiplication

even though nearly all riscv boards do have these features. I think zig needs to make it easier to select the more common boards, and more obvious what selections one is making as part of the target.

For example if the target indicated that 64 bit multiplication is available - which it almost certainly is - then it would side-step this issue. Still an issue though.

@andrewrk
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On Linux, clang defaults riscv64 features to "+a,+c,+d,+f,+m,+relax", which side-steps this issue.

@andrewrk andrewrk modified the milestones: 0.6.0, 0.5.0 Sep 23, 2019
andrewrk added a commit that referenced this issue Sep 25, 2019
@andrewrk
better default enabled features for riscv
53210b2 
Until ability to specify target CPU features (#2883) is done, this
commit gives riscv target better default features.

This side-steps #3275 which is a deficiency in compiler-rt when features
do not include 32 bit integer division.

With this commit, RISC-V compiler-rt tests pass and Hello World works
both pure-zig and with musl libc.
@andrewrk
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After 53210b2, this issue is not encountered (however, it should remain open until the bug in compiler-rt is fixed). After that commit RISC-V compiler-rt tests pass and Hello World works both pure-zig and with musl libc.

The next step for RISC-V is behavior tests, which are failing with TODO C ABI panic.

@andrewrk andrewrk modified the milestones: 0.5.0, 0.6.0 Sep 25, 2019
@luismarques
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even though nearly all riscv boards do have these features. I think zig needs to make it easier to select the more common boards, and more obvious what selections one is making as part of the target.

Yes, when targeting Linux the "GC" extensions should be the default (shorthand for IMAFDC). When targeting a bare metal RV64 it arguably makes sense to not assume any extensions by default, although the 64-bit processors are indeed very likely to include the standard ones. In any case, this issue should still be fixed on the compiler-rt side.

@daurnimator daurnimator mentioned this issue Jan 22, 2020
Merged
@andrewrk andrewrk modified the milestones: 0.6.0, 0.7.0 Mar 31, 2020
@andrewrk andrewrk modified the milestones: 0.7.0, 0.8.0 Oct 30, 2020
@andrewrk andrewrk modified the milestones: 0.8.0, 0.8.1 Jun 4, 2021
@andrewrk andrewrk modified the milestones: 0.8.1, 0.9.1 Sep 1, 2021
@andrewrk andrewrk modified the milestones: 0.9.1, 0.9.0, 0.10.0 Nov 20, 2021
@andrewrk andrewrk modified the milestones: 0.10.0, 0.11.0 Apr 17, 2022
@andrewrk andrewrk removed this from the 0.11.0 milestone Apr 12, 2023
@andrewrk andrewrk added this to the 0.12.0 milestone Apr 12, 2023
@hack3ric hack3ric mentioned this issue Apr 20, 2023
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@alexrp alexrp added compiler-rt and removed upstream An issue with a third party project that Zig uses. labels Oct 3, 2024
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alexrp commented Oct 3, 2024

LLVM bug has long since been fixed.

We'll now want to port this over to Zig: https://github.com/llvm/llvm-project/tree/6c331e50e4bfb4158d16ec3fe17ad7bb5c739e9f/compiler-rt/lib/builtins/riscv

@alexrp alexrp added the contributor friendly This issue is limited in scope and/or knowledge of Zig internals. label Oct 3, 2024
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