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@dongxuy04 dongxuy04 commented Aug 11, 2025

Summary by CodeRabbit

  • New Features

    • Enabled loading Mixture-of-Experts (MoE) weights on CPU as well as GPU, improving flexibility for environments without CUDA and supporting broader deployment and preparation workflows.
  • Refactor

    • Renamed an internal quantization operator argument; behavior and outputs unchanged. No user action required.

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@dongxuy04 dongxuy04 requested a review from a team as a code owner August 11, 2025 09:08
@dongxuy04 dongxuy04 requested a review from HuiGao-NV August 11, 2025 09:08
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coderabbitai bot commented Aug 11, 2025

📝 Walkthrough

Walkthrough

Updated a kwarg name in an fp4_quantize call within fused_moe_wide_ep.py and removed CUDA-only assertions in four weight-loading helpers in quantization.py, allowing destination tensors to be non-CUDA while still deriving device from the destination tensor.

Changes

Cohort / File(s) Summary of Changes
Kwarg rename in fp4_quantize call
tensorrt_llm/_torch/modules/fused_moe/fused_moe_wide_ep.py
In forward_chunk, renamed the keyword argument passed to torch.ops.trtllm.fp4_quantize from swizzedLayout=False to isSfSwizzledLayout=False. Value unchanged; no behavioral or shape changes.
Relax device restriction for weight loading
tensorrt_llm/_torch/modules/fused_moe/quantization.py
Removed assertions requiring destination tensors to be on CUDA in four helpers (load_expert_w3_w1_weight, load_expert_w2_weight, load_expert_w3_w1_weight_scale_nvfp4, load_expert_w2_weight_scale_nvfp4), allowing CPU/non-CUDA destinations; device is still taken from the destination tensor and passed to load_weight_shard.

Estimated code review effort

🎯 2 (Simple) | ⏱️ ~8 minutes

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@dongxuy04 dongxuy04 requested review from hlu1 and kaiyux August 11, 2025 09:12
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PR_Github #14786 [ run ] triggered by Bot

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PR_Github #14786 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #11164 completed with status: 'SUCCESS'

@dongxuy04 dongxuy04 requested a review from yuxianq August 12, 2025 01:54
Signed-off-by: Dongxu Yang <[email protected]>
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@dongxuy04 dongxuy04 enabled auto-merge (squash) August 12, 2025 02:25
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Actionable comments posted: 0

🔭 Outside diff range comments (2)
tensorrt_llm/_torch/modules/fused_moe/quantization.py (2)

1580-1599: Gate CPU execution in fused MoE quantization methods
The CPU path still calls CUDA-only ops (block_scale_interleave + torch.cuda.synchronize), which will fail when device.type!="cuda". We need to skip the interleave/sync on CPU in both methods and ensure it runs later when scales land on CUDA.

• In load_expert_w3_w1_weight_scale_nvfp4 (around lines 1563–1576)
• In load_expert_w2_weight_scale_nvfp4 (around lines 1589–1599)

Suggested patch for each location:

         orig_shape = dst_…_weight_scale.shape

-        dst_…_weight_scale_interleaved = torch.ops.trtllm.block_scale_interleave(
-            dst_…_weight_scale.view(float4_sf_dtype)
-        ).view(self.block_scales_dtype).reshape(orig_shape)
-
-        torch.cuda.synchronize()
-
-        dst_…_weight_scale.copy_(dst_…_weight_scale_interleaved)
+        # Only interleave & sync on CUDA
+        if device.type == "cuda":
+            interleaved = torch.ops.trtllm.block_scale_interleave(
+                dst_…_weight_scale.view(float4_sf_dtype)
+            ).view(self.block_scales_dtype).reshape(orig_shape)
+            torch.cuda.synchronize()
+            dst_…_weight_scale.copy_(interleaved)

• After patching, verify that when CPU-staged scales are later transferred to CUDA (e.g. by the layer load balancer/weight sharer), block_scale_interleave is applied before final use.


1540-1576: Only guard CUDA synchronization in CPU staging, not the interleave call

The CPU code path already supports block_scale_interleave, so we shouldn’t skip swizzling on CPU—only the GPU‐only sync needs guarding. Replace the unguarded torch.cuda.synchronize() with a device check:

--- a/tensorrt_llm/_torch/modules/fused_moe/quantization.py
+++ b/tensorrt_llm/_torch/modules/fused_moe/quantization.py
@@ lines 1567-1576
-        dst_w3_w1_weight_scale_interleaved = torch.ops.trtllm.block_scale_interleave(
-            dst_w3_w1_weight_scale.view(float4_sf_dtype)
-        ).view(self.block_scales_dtype).reshape(orig_shape)
-
-        torch.cuda.synchronize()
-
-        dst_w3_w1_weight_scale.copy_(dst_w3_w1_weight_scale_interleaved)
+        # Swizzle block scales for both CPU and CUDA paths
+        dst_w3_w1_weight_scale_interleaved = torch.ops.trtllm.block_scale_interleave(
+            dst_w3_w1_weight_scale.view(float4_sf_dtype)
+        ).view(self.block_scales_dtype).reshape(orig_shape)
+
+        # Only synchronize on CUDA devices
+        if device.type == "cuda":
+            torch.cuda.synchronize()
+
+        dst_w3_w1_weight_scale.copy_(dst_w3_w1_weight_scale_interleaved)

No further CPU‐to‐CUDA “fix-up” hook is needed: the initial load already performs the interleave on the host, and the registered migrate‐weight functions don’t re‐swizzle. This change ensures CPU staging won’t error on torch.cuda.synchronize() while preserving correct block‐scale interleaving everywhere.

🧹 Nitpick comments (2)
tensorrt_llm/_torch/modules/fused_moe/quantization.py (2)

350-361: Comment grammar + clarity: make the intent explicit

Thanks for moving the comment before the device capture; this addresses the earlier feedback. Nit: tighten the wording and reference the specific tensor for clarity.

Apply this diff:

-        # device don't have to be 'cuda', e.g. 'cpu' for online EPLB
+        # Device may be CPU (e.g., for online EPLB); derive device from dst_w3_w1_weight.
         device = dst_w3_w1_weight.device

375-383: Comment grammar + clarity: make the intent explicit

Same nit as above—tighten the wording and reference the destination tensor.

Apply this diff:

-        # device don't have to be 'cuda', e.g. 'cpu' for online EPLB
+        # Device may be CPU (e.g., for online EPLB); derive device from dst_w2_weight.
         device = dst_w2_weight.device
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kaiyux commented Aug 12, 2025

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PR_Github #14984 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #11314 completed with status: 'SUCCESS'
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@dongxuy04 dongxuy04 merged commit bd9a6dd into NVIDIA:main Aug 12, 2025
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