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[MIPS] match llvm.{min,max}num with {min,max}.fmt for R6 #89021

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16 changes: 16 additions & 0 deletions llvm/lib/Target/Mips/Mips32r6InstrInfo.td
Original file line number Diff line number Diff line change
Expand Up @@ -1117,6 +1117,22 @@ def : MipsPat<(select i32:$cond, immz, i32:$f),
ISA_MIPS32R6;
}

// llvm.fmin/fmax operations.
let AdditionalPredicates = [NotInMicroMips] in {
def : MipsPat<(fmaxnum f32:$lhs, f32:$rhs),
(MAX_S f32:$lhs, f32:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fmaxnum f64:$lhs, f64:$rhs),
(MAX_D f64:$lhs, f64:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fminnum f32:$lhs, f32:$rhs),
(MIN_S f32:$lhs, f32:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fminnum f64:$lhs, f64:$rhs),
(MIN_D f64:$lhs, f64:$rhs)>,
ISA_MIPS32R6;
}

// Pseudo instructions
let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, hasDelaySlot = 1,
hasExtraSrcRegAllocReq = 1, isCTI = 1, Defs = [AT], hasPostISelHook = 1 in {
Expand Down
9 changes: 9 additions & 0 deletions llvm/lib/Target/Mips/MipsISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -358,6 +358,15 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom);
setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);

// Lower fmin and fmax operations for MIPS R6.
// Instructions are defined but never used.
if (Subtarget.hasMips32r6() || Subtarget.hasMips64r6()) {
setOperationAction(ISD::FMINNUM, MVT::f32, Legal);
setOperationAction(ISD::FMINNUM, MVT::f64, Legal);
setOperationAction(ISD::FMAXNUM, MVT::f32, Legal);
setOperationAction(ISD::FMAXNUM, MVT::f64, Legal);
}

if (Subtarget.isGP64bit()) {
setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
setOperationAction(ISD::BlockAddress, MVT::i64, Custom);
Expand Down
69 changes: 69 additions & 0 deletions llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,69 @@
; RUN: llc %s -mtriple=mipsisa32r6el-linux-gnu -o - | \
; RUN: FileCheck %s --check-prefix=MIPS32R6EL
; RUN: llc %s -mtriple=mipsisa64r6el-linux-gnuabi64 -o - | \
; RUN: FileCheck %s --check-prefix=MIPS64R6EL

define float @mins(float %x, float %y) {
; MIPS32R6EL-LABEL: mins
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: min.s $f0, $f12, $f14
;
; MIPS64R6EL-LABEL: mins
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: min.s $f0, $f12, $f13

%r = tail call float @llvm.minnum.f32(float %x, float %y)
ret float %r
}

define float @maxs(float %x, float %y) {
; MIPS32R6EL-LABEL: maxs
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: max.s $f0, $f12, $f14
;
; MIPS64R6EL-LABEL: maxs
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: max.s $f0, $f12, $f13

%r = tail call float @llvm.maxnum.f32(float %x, float %y)
ret float %r
}

define double @mind(double %x, double %y) {
; MIPS32R6EL-LABEL: mind
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: min.d $f0, $f12, $f14
;
; MIPS64R6EL-LABEL: mind
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: min.d $f0, $f12, $f13

%r = tail call double @llvm.minnum.f64(double %x, double %y)
ret double %r
}

define double @maxd(double %x, double %y) {
; MIPS32R6EL-LABEL: maxd
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: max.d $f0, $f12, $f14
;
; MIPS64R6EL-LABEL: maxd
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: max.d $f0, $f12, $f13

%r = tail call double @llvm.maxnum.f64(double %x, double %y)
ret double %r
}

declare float @llvm.minnum.f32(float, float)
declare float @llvm.maxnum.f32(float, float)
declare double @llvm.minnum.f64(double, double)
declare double @llvm.maxnum.f64(double, double)
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