[CodeGen] Port two-address-instructions to new pass manager
#98632
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@llvm/pr-subscribers-backend-hexagon @llvm/pr-subscribers-llvm-globalisel Author: None (paperchalice) ChangesAdd Patch is 36.59 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/98632.diff 20 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h b/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
new file mode 100644
index 0000000000000..55167d50eb2ec
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
@@ -0,0 +1,25 @@
+//===- llvm/CodeGen/TwoAddressInstructionPass.h -----------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_TWOADDRESSINSTRUCTIONPASS_H
+#define LLVM_CODEGEN_TWOADDRESSINSTRUCTIONPASS_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+
+class TwoAddressInstructionPass
+ : public PassInfoMixin<TwoAddressInstructionPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_TWOADDRESSINSTRUCTIONPASS_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 8979fcd95aa9a..a12e93a151647 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -298,7 +298,7 @@ void initializeTargetLibraryInfoWrapperPassPass(PassRegistry&);
void initializeTargetPassConfigPass(PassRegistry&);
void initializeTargetTransformInfoWrapperPassPass(PassRegistry&);
void initializeTLSVariableHoistLegacyPassPass(PassRegistry &);
-void initializeTwoAddressInstructionPassPass(PassRegistry&);
+void initializeTwoAddressInstructionLegacyPassPass(PassRegistry &);
void initializeTypeBasedAAWrapperPassPass(PassRegistry&);
void initializeTypePromotionLegacyPass(PassRegistry&);
void initializeInitUndefPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index 81900510c9ae7..5b8e69b602e2b 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -52,6 +52,7 @@
#include "llvm/CodeGen/SjLjEHPrepare.h"
#include "llvm/CodeGen/StackProtector.h"
#include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/CodeGen/TwoAddressInstructionPass.h"
#include "llvm/CodeGen/UnreachableBlockElim.h"
#include "llvm/CodeGen/WasmEHPrepare.h"
#include "llvm/CodeGen/WinEHPrepare.h"
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index d5cd8d4a132fc..e285a13681af2 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -148,6 +148,7 @@ MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(dbgs()))
MACHINE_FUNCTION_PASS("require-all-machine-function-properties",
RequireAllMachineFunctionPropertiesPass())
MACHINE_FUNCTION_PASS("trigger-verifier-error", TriggerVerifierErrorPass())
+MACHINE_FUNCTION_PASS("two-address-instruction", TwoAddressInstructionPass())
#undef MACHINE_FUNCTION_PASS
#ifndef MACHINE_FUNCTION_PASS_WITH_PARAMS
@@ -257,7 +258,6 @@ DUMMY_MACHINE_FUNCTION_PASS("stack-frame-layout", StackFrameLayoutAnalysisPass)
DUMMY_MACHINE_FUNCTION_PASS("stack-slot-coloring", StackSlotColoringPass)
DUMMY_MACHINE_FUNCTION_PASS("stackmap-liveness", StackMapLivenessPass)
DUMMY_MACHINE_FUNCTION_PASS("tailduplication", TailDuplicatePass)
-DUMMY_MACHINE_FUNCTION_PASS("twoaddressinstruction", TwoAddressInstructionPass)
DUMMY_MACHINE_FUNCTION_PASS("unpack-mi-bundles", UnpackMachineBundlesPass)
DUMMY_MACHINE_FUNCTION_PASS("virtregrewriter", VirtRegRewriterPass)
DUMMY_MACHINE_FUNCTION_PASS("xray-instrumentation", XRayInstrumentationPass)
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index ccd8f76fb4f63..ee0ebfd943eb5 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -132,7 +132,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeStripDebugMachineModulePass(Registry);
initializeTailDuplicatePass(Registry);
initializeTargetPassConfigPass(Registry);
- initializeTwoAddressInstructionPassPass(Registry);
+ initializeTwoAddressInstructionLegacyPassPass(Registry);
initializeTypePromotionLegacyPass(Registry);
initializeUnpackMachineBundlesPass(Registry);
initializeUnreachableBlockElimLegacyPassPass(Registry);
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index 73385fee019b0..2a6dda8c89c0d 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -26,6 +26,7 @@
//
//===----------------------------------------------------------------------===//
+#include "llvm/CodeGen/TwoAddressInstructionPass.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
@@ -36,10 +37,12 @@
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
@@ -86,7 +89,7 @@ static cl::opt<unsigned> MaxDataFlowEdge(
namespace {
-class TwoAddressInstructionPass : public MachineFunctionPass {
+class TwoAddressInstructionImpl {
MachineFunction *MF = nullptr;
const TargetInstrInfo *TII = nullptr;
const TargetRegisterInfo *TRI = nullptr;
@@ -185,11 +188,31 @@ class TwoAddressInstructionPass : public MachineFunctionPass {
void eliminateRegSequence(MachineBasicBlock::iterator&);
bool processStatepoint(MachineInstr *MI, TiedOperandMap &TiedOperands);
+public:
+ TwoAddressInstructionImpl(MachineFunction &MF, MachineFunctionPass *P);
+ TwoAddressInstructionImpl(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+ void setOptLevel(CodeGenOptLevel Level) { OptLevel = Level; }
+ bool run();
+};
+
+class TwoAddressInstructionLegacyPass : public MachineFunctionPass {
public:
static char ID; // Pass identification, replacement for typeid
- TwoAddressInstructionPass() : MachineFunctionPass(ID) {
- initializeTwoAddressInstructionPassPass(*PassRegistry::getPassRegistry());
+ TwoAddressInstructionLegacyPass() : MachineFunctionPass(ID) {
+ initializeTwoAddressInstructionLegacyPassPass(
+ *PassRegistry::getPassRegistry());
+ }
+
+ /// Pass entry point.
+ bool runOnMachineFunction(MachineFunction &MF) override {
+ TwoAddressInstructionImpl Impl(MF, this);
+ // Disable optimizations if requested. We cannot skip the whole pass as some
+ // fixups are necessary for correctness.
+ if (skipFunction(MF.getFunction()))
+ Impl.setOptLevel(CodeGenOptLevel::None);
+ return Impl.run();
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
@@ -203,26 +226,75 @@ class TwoAddressInstructionPass : public MachineFunctionPass {
AU.addPreservedID(MachineDominatorsID);
MachineFunctionPass::getAnalysisUsage(AU);
}
-
- /// Pass entry point.
- bool runOnMachineFunction(MachineFunction&) override;
};
} // end anonymous namespace
-char TwoAddressInstructionPass::ID = 0;
+PreservedAnalyses
+TwoAddressInstructionPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ // Disable optimizations if requested. We cannot skip the whole pass as some
+ // fixups are necessary for correctness.
+ TwoAddressInstructionImpl Impl(MF, MFAM);
+ if (MF.getFunction().hasOptNone())
+ Impl.setOptLevel(CodeGenOptLevel::None);
+
+ bool Changed = Impl.run();
+ if (!Changed)
+ return PreservedAnalyses::all();
+ auto PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserve<LiveIntervalsAnalysis>();
+ PA.preserve<LiveVariablesAnalysis>();
+ PA.preserve<MachineDominatorTreeAnalysis>();
+ PA.preserve<MachineLoopAnalysis>();
+ PA.preserve<SlotIndexesAnalysis>();
+ PA.preserveSet<CFGAnalyses>();
+ return PA;
+}
+
+char TwoAddressInstructionLegacyPass::ID = 0;
-char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID;
+char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionLegacyPass::ID;
-INITIALIZE_PASS_BEGIN(TwoAddressInstructionPass, DEBUG_TYPE,
- "Two-Address instruction pass", false, false)
+INITIALIZE_PASS_BEGIN(TwoAddressInstructionLegacyPass, DEBUG_TYPE,
+ "Two-Address instruction pass", false, false)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
-INITIALIZE_PASS_END(TwoAddressInstructionPass, DEBUG_TYPE,
- "Two-Address instruction pass", false, false)
+INITIALIZE_PASS_END(TwoAddressInstructionLegacyPass, DEBUG_TYPE,
+ "Two-Address instruction pass", false, false)
+
+TwoAddressInstructionImpl::TwoAddressInstructionImpl(
+ MachineFunction &Func, MachineFunctionAnalysisManager &MFAM)
+ : MF(&Func), TII(Func.getSubtarget().getInstrInfo()),
+ TRI(Func.getSubtarget().getRegisterInfo()),
+ InstrItins(Func.getSubtarget().getInstrItineraryData()),
+ MRI(&Func.getRegInfo()),
+ LV(MFAM.getCachedResult<LiveVariablesAnalysis>(Func)),
+ LIS(MFAM.getCachedResult<LiveIntervalsAnalysis>(Func)),
+ OptLevel(Func.getTarget().getOptLevel()) {
+ auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(Func)
+ .getManager();
+ AA = FAM.getCachedResult<AAManager>(Func.getFunction());
+}
+
+TwoAddressInstructionImpl::TwoAddressInstructionImpl(MachineFunction &Func,
+ MachineFunctionPass *P)
+ : MF(&Func), TII(Func.getSubtarget().getInstrInfo()),
+ TRI(Func.getSubtarget().getRegisterInfo()),
+ InstrItins(Func.getSubtarget().getInstrItineraryData()),
+ MRI(&Func.getRegInfo()), OptLevel(Func.getTarget().getOptLevel()) {
+ auto *LVWrapper = P->getAnalysisIfAvailable<LiveVariablesWrapperPass>();
+ LV = LVWrapper ? &LVWrapper->getLV() : nullptr;
+ auto *LISWrapper = P->getAnalysisIfAvailable<LiveIntervalsWrapperPass>();
+ LIS = LISWrapper ? &LISWrapper->getLIS() : nullptr;
+ if (auto *AAPass = P->getAnalysisIfAvailable<AAResultsWrapperPass>())
+ AA = &AAPass->getAAResults();
+ else
+ AA = nullptr;
+}
/// Return the MachineInstr* if it is the single def of the Reg in current BB.
MachineInstr *
-TwoAddressInstructionPass::getSingleDef(Register Reg,
+TwoAddressInstructionImpl::getSingleDef(Register Reg,
MachineBasicBlock *BB) const {
MachineInstr *Ret = nullptr;
for (MachineInstr &DefMI : MRI->def_instructions(Reg)) {
@@ -243,7 +315,7 @@ TwoAddressInstructionPass::getSingleDef(Register Reg,
/// %Tmp2 = copy %ToReg;
/// MaxLen specifies the maximum length of the copy chain the func
/// can walk through.
-bool TwoAddressInstructionPass::isRevCopyChain(Register FromReg, Register ToReg,
+bool TwoAddressInstructionImpl::isRevCopyChain(Register FromReg, Register ToReg,
int Maxlen) {
Register TmpReg = FromReg;
for (int i = 0; i < Maxlen; i++) {
@@ -263,7 +335,7 @@ bool TwoAddressInstructionPass::isRevCopyChain(Register FromReg, Register ToReg,
/// in the MBB that defines the specified register and the two-address
/// instruction which is being processed. It also returns the last def location
/// by reference.
-bool TwoAddressInstructionPass::noUseAfterLastDef(Register Reg, unsigned Dist,
+bool TwoAddressInstructionImpl::noUseAfterLastDef(Register Reg, unsigned Dist,
unsigned &LastDef) {
LastDef = 0;
unsigned LastUse = Dist;
@@ -286,7 +358,7 @@ bool TwoAddressInstructionPass::noUseAfterLastDef(Register Reg, unsigned Dist,
/// Return true if the specified MI is a copy instruction or an extract_subreg
/// instruction. It also returns the source and destination registers and
/// whether they are physical registers by reference.
-bool TwoAddressInstructionPass::isCopyToReg(MachineInstr &MI, Register &SrcReg,
+bool TwoAddressInstructionImpl::isCopyToReg(MachineInstr &MI, Register &SrcReg,
Register &DstReg, bool &IsSrcPhys,
bool &IsDstPhys) const {
SrcReg = 0;
@@ -306,7 +378,7 @@ bool TwoAddressInstructionPass::isCopyToReg(MachineInstr &MI, Register &SrcReg,
return true;
}
-bool TwoAddressInstructionPass::isPlainlyKilled(const MachineInstr *MI,
+bool TwoAddressInstructionImpl::isPlainlyKilled(const MachineInstr *MI,
LiveRange &LR) const {
// This is to match the kill flag version where undefs don't have kill flags.
if (!LR.hasAtLeastOneValue())
@@ -320,7 +392,7 @@ bool TwoAddressInstructionPass::isPlainlyKilled(const MachineInstr *MI,
/// Test if the given register value, which is used by the
/// given instruction, is killed by the given instruction.
-bool TwoAddressInstructionPass::isPlainlyKilled(const MachineInstr *MI,
+bool TwoAddressInstructionImpl::isPlainlyKilled(const MachineInstr *MI,
Register Reg) const {
// FIXME: Sometimes tryInstructionTransform() will add instructions and
// test whether they can be folded before keeping them. In this case it
@@ -344,7 +416,7 @@ bool TwoAddressInstructionPass::isPlainlyKilled(const MachineInstr *MI,
/// Test if the register used by the given operand is killed by the operand's
/// instruction.
-bool TwoAddressInstructionPass::isPlainlyKilled(
+bool TwoAddressInstructionImpl::isPlainlyKilled(
const MachineOperand &MO) const {
return MO.isKill() || isPlainlyKilled(MO.getParent(), MO.getReg());
}
@@ -366,7 +438,7 @@ bool TwoAddressInstructionPass::isPlainlyKilled(
///
/// If allowFalsePositives is true then likely kills are treated as kills even
/// if it can't be proven that they are kills.
-bool TwoAddressInstructionPass::isKilled(MachineInstr &MI, Register Reg,
+bool TwoAddressInstructionImpl::isKilled(MachineInstr &MI, Register Reg,
bool allowFalsePositives) const {
MachineInstr *DefMI = &MI;
while (true) {
@@ -411,7 +483,7 @@ static bool isTwoAddrUse(MachineInstr &MI, Register Reg, Register &DstReg) {
/// Given a register, if all its uses are in the same basic block, return the
/// last use instruction if it's a copy or a two-address use.
-MachineInstr *TwoAddressInstructionPass::findOnlyInterestingUse(
+MachineInstr *TwoAddressInstructionImpl::findOnlyInterestingUse(
Register Reg, MachineBasicBlock *MBB, bool &IsCopy, Register &DstReg,
bool &IsDstPhys) const {
MachineOperand *UseOp = nullptr;
@@ -468,7 +540,7 @@ static MCRegister getMappedReg(Register Reg,
}
/// Return true if the two registers are equal or aliased.
-bool TwoAddressInstructionPass::regsAreCompatible(Register RegA,
+bool TwoAddressInstructionImpl::regsAreCompatible(Register RegA,
Register RegB) const {
if (RegA == RegB)
return true;
@@ -478,7 +550,7 @@ bool TwoAddressInstructionPass::regsAreCompatible(Register RegA,
}
/// From RegMap remove entries mapped to a physical register which overlaps MO.
-void TwoAddressInstructionPass::removeMapRegEntry(
+void TwoAddressInstructionImpl::removeMapRegEntry(
const MachineOperand &MO, DenseMap<Register, Register> &RegMap) const {
assert(
(MO.isReg() || MO.isRegMask()) &&
@@ -510,7 +582,7 @@ void TwoAddressInstructionPass::removeMapRegEntry(
///
/// After the MUL instruction, $rdx contains different value than in the COPY
/// instruction. So %2 should not map to $rdx after MUL.
-void TwoAddressInstructionPass::removeClobberedSrcRegMap(MachineInstr *MI) {
+void TwoAddressInstructionImpl::removeClobberedSrcRegMap(MachineInstr *MI) {
if (MI->isCopy()) {
// If a virtual register is copied to its mapped physical register, it
// doesn't change the potential coalescing between them, so we don't remove
@@ -546,7 +618,7 @@ void TwoAddressInstructionPass::removeClobberedSrcRegMap(MachineInstr *MI) {
}
// Returns true if Reg is equal or aliased to at least one register in Set.
-bool TwoAddressInstructionPass::regOverlapsSet(
+bool TwoAddressInstructionImpl::regOverlapsSet(
const SmallVectorImpl<Register> &Set, Register Reg) const {
for (unsigned R : Set)
if (TRI->regsOverlap(R, Reg))
@@ -557,7 +629,7 @@ bool TwoAddressInstructionPass::regOverlapsSet(
/// Return true if it's potentially profitable to commute the two-address
/// instruction that's being processed.
-bool TwoAddressInstructionPass::isProfitableToCommute(Register RegA,
+bool TwoAddressInstructionImpl::isProfitableToCommute(Register RegA,
Register RegB,
Register RegC,
MachineInstr *MI,
@@ -662,7 +734,7 @@ bool TwoAddressInstructionPass::isProfitableToCommute(Register RegA,
/// Commute a two-address instruction and update the basic block, distance map,
/// and live variables if needed. Return true if it is successful.
-bool TwoAddressInstructionPass::commuteInstruction(MachineInstr *MI,
+bool TwoAddressInstructionImpl::commuteInstruction(MachineInstr *MI,
unsigned DstIdx,
unsigned RegBIdx,
unsigned RegCIdx,
@@ -693,7 +765,7 @@ bool TwoAddressInstructionPass::commuteInstruction(MachineInstr *MI,
/// Return true if it is profitable to convert the given 2-address instruction
/// to a 3-address one.
-bool TwoAddressInstructionPass::isProfitableToConv3Addr(Register RegA,
+bool TwoAddressInstructionImpl::isProfitableToConv3Addr(Register RegA,
Register RegB) {
// Look for situations like this:
// %reg1024 = MOV r1
@@ -710,7 +782,7 @@ bool TwoAddressInstructionPass::isProfitableToConv3Addr(Register RegA,
/// Convert the specified two-address instruction into a three address one.
/// Return true if this transformation was successful.
-bool TwoAddressInstructionPass::convertInstTo3Addr(
+bool TwoAddressInstructionImpl::convertInstTo3Addr(
MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi,
Register RegA, Register RegB, unsigned &Dist) {
MachineInstrSpan MIS(mi, MBB);
@@ -752,7 +824,7 @@ bool TwoAddressInstructionPass::convertInstTo3Addr(
/// Scan forward recursively for only uses, update maps if the use is a copy or
/// a two-address instruction.
-void TwoAddressInstructionPass::scanUses(Register DstReg) {
+void TwoAddressInstructionImpl::scanUses(Register DstReg) {
SmallVector<Register, 4> VirtRegPairs;
bool IsDstPhys;
bool IsCopy = false;
@@ -805,7 +877,7 @@ void TwoAddressInstructionPass::scanUses(Register DstReg) {
/// coalesced to r0 (from the input side). v1025 is mapped to r1. v1026 is
/// potentially joined with r1 on the output side. It's worthwhile to commute
/// 'add' to eliminate a copy.
-void TwoAddressInstructionPass::processCopy(MachineInstr *MI) {
+void TwoAddressInstructionImpl::processCopy(MachineInstr *MI) {
if (Processed.count(MI))
return;
@@ -831,7 +903,7 @@ void TwoAddressInstructionPass::processCopy(MachineInstr *MI) {
/// If there is one more local instruction that reads 'Reg' and it kills 'Reg,
/// consider moving the instruction below the kill instruction in order to
/// eliminate the need for the copy.
-bool TwoAddressInstructionPass::rescheduleMIBelowKill(
+bool TwoAddressInstructionImpl::rescheduleMIBelowKill(
MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi,
Register Reg) {
// Bail immediately if we don't have LV or LIS available. We use them to find
@@ -998,7 +1070,7 @@ bool TwoAddressInstructionPass::rescheduleMIBelowKill(
/// Return true if the re-scheduling will put the given instruction too c...
[truncated]
|
arsenm
reviewed
Jul 12, 2024
| // Disable optimizations if requested. We cannot skip the whole pass as some | ||
| // fixups are necessary for correctness. | ||
| TwoAddressInstructionImpl Impl(MF, MFAM); | ||
| if (MF.getFunction().hasOptNone()) |
There was a problem hiding this comment.
shouldn't this be skipFunction the same way?
There was a problem hiding this comment.
skipFunction is legacy pass manager only and there is no counterpart in new pass manager, so here just check the optnone, like what skipFunction do. The rest part in skipFunction is in instrumentation.
arsenm
approved these changes
Jul 12, 2024
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TwoAddressInstructionPass.