bcm270x: Get bus address from Device Tree #1693
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This reverts commit 15001e5.
smsc95xx is adjusting truesize when it shouldn't, and following a recent patch from Eric this is now triggering warnings. This patch stops smsc95xx from changing truesize. Signed-off-by: Steve Glendinning <[email protected]>
Signed-off-by: Sam Nazarko <[email protected]>
Signed-off-by: popcornmix <[email protected]>
tty_port_hangup sets a port's tty field to NULL (holding the port lock), but uart_tx_stopped, called from __uart_start (with the port lock), uses the tty field without checking for NULL. Change uart_tx_stopped to treat a NULL tty field as another stopped indication. Signed-off-by: Phil Elwell <[email protected]>
Without this patch, removing a device tree overlay can crash here. Signed-off-by: Phil Elwell <[email protected]>
See commit dae803e -- the warning is expected sometimes when using CMA. However, that commit still spams my kernel log with these warnings. Signed-off-by: Eric Anholt <[email protected]>
The old arch-specific IRQ macros included a dsb to ensure the write to clear the mailbox interrupt completed before returning from the interrupt. The BCM2836 irqchip driver needs the same precaution to avoid spurious interrupts. Spurious interrupts are still possible for other reasons, though, so trap them early.
Add a duplicate irq range with an offset on the hwirq's so the driver can detect that enable_fiq() is used. Tested with downstream dwc_otg USB controller driver. Signed-off-by: Noralf Trønnes <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Noralf Trønnes <[email protected]>
Signed-off-by: Noralf Tronnes <[email protected]>
Contrary to the documentation, the BCM2835 GPIO controller actually has four interrupt lines - one each for the three IRQ groups and one common. Rather confusingly, the GPIO interrupt groups don't correspond directly with the GPIO control banks. Instead, GPIOs 0-27 generate IRQ GPIO0, 28-45 GPIO1 and 46-53 GPIO2. Awkwardly, the GPIOS for IRQ GPIO1 straddle two 32-entry GPIO banks, so it is cleaner to split out a function to process the interrupts for a single GPIO bank. This bug has only just been observed because GPIOs above 27 can only be accessed on an old Raspberry Pi with the optional P5 header fitted, where the pins are often used for I2S instead.
Although the GPIO controller can generate three interrupts (four counting the common one), the device tree files currently only specify two. In the absence of the third, simply don't register that interrupt (as opposed to registering 0), which has the effect of making it impossible to generate interrupts for GPIOs 46-53 which, since they share pins with the SD card interface, is unlikely to be a problem.
When dynamically unloading overlays, it is important that freed pins are restored to being inputs to prevent functions from being enabled in multiple places at once. Signed-off-by: Phil Elwell <[email protected]>
The spi-bcm2835 driver automatically uses GPIO chip-selects due to some unreliability of the native ones. In doing so it chooses the same pins as the native chip-selects would use, but the existing code always uses pins 7 and 8, wherever the SPI function is mapped. Search the pinctrl group assigned to the driver for pins that correspond to native chip-selects, and use those for GPIO chip- selects. Signed-off-by: Phil Elwell <[email protected]>
Select software CS in bcm2708_common.dtsi, and disable the automatic conversion in the driver to allow hardware CS to be re-enabled with an overlay. See: #1547 Signed-off-by: Phil Elwell <[email protected]>
The VideoCore bootloader passes in Serial number and Revision number through Device Tree. Make these available to userspace through /proc/cpuinfo. Mainline status: There is a commit in linux-next that standardize passing the serial number through Device Tree (string: /serial-number): ARM: 8355/1: arch: Show the serial number from devicetree in cpuinfo There was an attempt to do the same with the revision number, but it didn't get in: [PATCH v2 1/2] arm: devtree: Set system_rev from DT revision Signed-off-by: Noralf Trønnes <[email protected]>
Load driver early since at least bcm2708_fb doesn't support deferred probing and even if it did, we don't want the video driver deferred. Support the legacy DMA API which is needed by bcm2708_fb. Don't mask out channel 2. Signed-off-by: Noralf Trønnes <[email protected]>
This is a hack until a proper solution is agreed upon. Martin Sperl is doing some work in this area. Signed-off-by: Noralf Trønnes <[email protected]>
The VPU clock is also the clock for our AXI bus, so we really can't
disable it. This might have happened during boot if, for example,
uart1 (aux_uart clock) probed and was then disabled before the other
consumers of the VPU clock had probed.
v2: Rewrite to use a .flags in bcm2835_clock_data, since other clocks
will need this too.
Signed-off-by: Eric Anholt <[email protected]>
These divide off of PLLD_PER and are used for the ethernet and wifi PHYs source PLLs. Neither of them is currently represented by a phy device that would grab the clock for us. This keeps other drivers from killing the networking PHYs when they disable their own clocks and trigger PLLD_PER's refcount going to 0. v2: Skip marking as critical if they aren't on at boot. Signed-off-by: Eric Anholt <[email protected]>
If the firmware had set up a clock to source from PLLC, go along with it. But if we're looking for a new parent, we don't want to switch it to PLLC because the firmware will force PLLC (and thus the AXI bus clock) to different frequencies during over-temp/under-voltage, without notification to Linux. On my system, this moves the Linux-enabled HDMI state machine and DSI1 escape clock over to plld_per from pllc_per. EMMC still ends up on pllc_per, because the firmware had set it up to use that. Signed-off-by: Eric Anholt <[email protected]> Fixes: 41691b8 ("clk: bcm2835: Add support for programming the audio domain clocks")
While the SDRAM is being driven by its dedicated PLL most of the time, there is a little loop running in the firmware that periodically turns on the CM SDRAM clock (using its pre-initialized parent) and switches SDRAM to using the CM clock to do PVT recalibration. This avoids system hangs if we choose SDRAM's parent for some other clock, then disable that clock. Signed-off-by: Eric Anholt <[email protected]>
| /a/builder/mnt/build/tmp-glibc/work-shared/raspberrypi3/kernel-source/drivers/media/platform/bcm2835/bcm2835-camera.c:656:17: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types ] | .queue_setup = queue_setup, | ^~~~~~~~~~~ | /a/builder/mnt/build/tmp-glibc/work-shared/raspberrypi3/kernel-source/drivers/media/platform/bcm2835/bcm28 35-camera.c:656:17: note: (near initialization for 'bm2835_mmal_video_qops.queue_setup') use struct device* instead of void* Signed-off-by: Khem Raj <[email protected]>
irq-bcm2836 handles this through these functions: bcm2835_init_local_timer_frequency() bcm2836_arm_irqchip_smp_init() Signed-off-by: Noralf Trønnes <[email protected]>
The mainline Device Tree files are quite close to downstream now.
Let's use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi as base files
for our dts files.
Mainline dts files are based on these files:
bcm2835-rpi.dtsi
bcm2835.dtsi bcm2836.dtsi
bcm283x.dtsi
Current downstream are based on these:
bcm2708.dtsi bcm2709.dtsi bcm2710.dtsi
bcm2708_common.dtsi
This patch introduces this dependency:
bcm2708.dtsi bcm2709.dtsi
bcm2708-rpi.dtsi
bcm270x.dtsi
bcm2835.dtsi bcm2836.dtsi
bcm283x.dtsi
And:
bcm2710.dtsi
bcm2708-rpi.dtsi
bcm270x.dtsi
bcm283x.dtsi
bcm270x.dtsi contains the downstream bcm283x.dtsi diff.
bcm2708-rpi.dtsi is the downstream version of bcm2835-rpi.dtsi.
Other changes:
- The led node has moved from /soc/leds to /leds. This is not a problem
since the label is used to reference it.
- The clk_osc reg property changes from 6 to 3.
- The gpu nodes has their interrupt property set in the base file.
- the clocks label does not point to the /clocks node anymore, but
points to the cprman node. This is not a problem since the overlays
that use the clock node refer to it directly: target-path = "/clocks";
- some nodes now have 2 labels since mainline and downstream differs in
this respect: cprman/clocks, spi0/spi, gpu/vc4.
- some nodes doesn't have an explicit status = "okay" since they're not
disabled in the base file: watchdog and random.
- gpiomem doesn't need an explicit status = "okay".
- bcm2708-rpi-cm.dts got the hpd-gpios property from bcm2708_common.dtsi,
it's now set directly in that file.
- bcm2709-rpi-2-b.dts has the timer node moved from /soc/timer to /timer.
- Removed clock-frequency property on the bcm{2709,2710}.dtsi timer nodes.
Signed-off-by: Noralf Trønnes <[email protected]>
The Raspberry Pi firmware looks at the RSTS register to know which partition to boot from. The reboot syscall command LINUX_REBOOT_CMD_RESTART2 supports passing in a string argument. Add support for passing in a partition number 0..63 to boot from. Partition 63 is a special partiton indicating halt. If the partition doesn't exist, the firmware falls back to partition 0. Signed-off-by: Noralf Trønnes <[email protected]>
The watchdog driver already has support for reboot/poweroff. Make use of this and remove the code from the platform files. Signed-off-by: Noralf Trønnes <[email protected]>
include/mach/vmalloc.h has not been used since 2011. include/mach/entry-macro.S is leftover from the move to the mainline irq driver. Signed-off-by: Noralf Trønnes <[email protected]>
The gated bcm2835-aux clock is now used to enable uart1 so drop this hack. Signed-off-by: Noralf Trønnes <[email protected]>
This reverts commit 86eba5c. The gated bcm2835-aux clock is now used to enable uart1 so drop this hack. Signed-off-by: Noralf Trønnes <[email protected]>
Since 4.8 of_platform_default_populate_init() does the same and it is called at arch_initcall_sync. Signed-off-by: Noralf Trønnes <[email protected]>
Drop the call to init_dma_coherent_pool_size(). The default 256kB is enough since vchiq dropped that atomic allocation some time back. Signed-off-by: Noralf Trønnes <[email protected]>
All drivers map their own io now so it's not necessary to do this mapping anymore. The mapping for the uart debug console is handled by debug_ll_io_init() if necessary. Remove local uart debug code and rely on mainline. Use these kconfig options to enable: CONFIG_DEBUG_BCM2835 CONFIG_DEBUG_BCM2836 Signed-off-by: Noralf Trønnes <[email protected]>
We are all DT now so use DT_MACHINE_START. Also drop the extra BCM2709-BCM2708 mix entry. Signed-off-by: Noralf Trønnes <[email protected]>
so that special/critical clocks can get enabled early on in the boot process avoiding the risk of disabling a clock, pll_divider or pll when a claiming driver fails to install propperly - maybe it needs to defer. Signed-off-by: Martin Sperl <[email protected]>
The dts comes from the Adafruit repository https://github.com/adafruit/Adafruit-Pi-Kernel-o-Matic/blob/pitft/pitft35r-overlay.dts Reformatted slightly to match conventions in the pitft28-resistive-overlay. Signed-off-by: Scott Ellis <[email protected]>
This reverts commit bcc804c.
1. Enable emulation of deprecated instructions. 2. Enable ARM 8.1 and 8.2 features which are not detected at runtime. 3. Switch the default governer to powersave. 4. Include the watchdog timer driver in the kernel image rather then a module. Tested with raspbian-jessie 2016-09-23.
NEED_MACH_IO_H isn't necessary since we don't have
PC card/PCI/ISA IO space.
The __io macro is only used in the {in,out}[bwl] macros.
arch/arm/include/asm/io.h will give these defaults now:
define __io(a) __typesafe_io((a) & IO_SPACE_LIMIT)
define IO_SPACE_LIMIT ((resource_size_t)0)
This is the same as ARCH_BCM2835.
Signed-off-by: Noralf Trønnes <[email protected]>
This makes it possible to get the bus address from Device Tree. Signed-off-by: Noralf Trønnes <[email protected]>
This makes it possible to get the bus address from Device Tree. At the same time move the call to log_init() after getting the clock to avoid allocating twice due to deferred probing. Signed-off-by: Noralf Trønnes <[email protected]>
Drop NEED_MACH_MEMORY_H and use dma-ranges from the Device Tree to get the bus address, like ARCH_BCM2835 does. This means that we go from this: arch/arm/mach-bcm270x/include/mach/memory.h: define __virt_to_bus(x) ((x) + (BUS_OFFSET - PAGE_OFFSET)) define __bus_to_virt(x) ((x) - (BUS_OFFSET - PAGE_OFFSET)) define __pfn_to_bus(x) (__pfn_to_phys(x) + BUS_OFFSET) define __bus_to_pfn(x) __phys_to_pfn((x) - BUS_OFFSET To this: arch/arm/include/asm/memory.h: define __virt_to_bus __virt_to_phys define __bus_to_virt __phys_to_virt define __pfn_to_bus(x) __pfn_to_phys(x) define __bus_to_pfn(x) __phys_to_pfn(x) Drivers now have to use the DMA API to get to the bus address. Signed-off-by: Noralf Trønnes <[email protected]>
bcm2835_timer has it's own kconfig option now, so use that. Signed-off-by: Noralf Trønnes <[email protected]>
This isn't used anymore now that the watchdog driver does restart/poweroff. Signed-off-by: Noralf Trønnes <[email protected]>
Move kconfig selects to the ARCH entry like 2709 does. CLKSRC_MMIO is selected by BCM2835_TIMER. NEED_MACH_GPIO_H left the kernel with 3.17. Signed-off-by: Noralf Trønnes <[email protected]>
Be consistent and use ARCH_BCM2708 and ARCH_BCM2709 everywhere. Simplify *SMI dependencies. Signed-off-by: Noralf Trønnes <[email protected]>
|
I will make a new PR that also converts to multi platform. |
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This is some more cleanup of bcm270x.
I was hoping to convert to ARCH_MULTIPLATFORM, but that didn't work out.
The main change in this PR is to get the bus/dma address from the Device Tree 'dma-ranges' property instead of hardcoding it.
Tested on Pi1 and Pi2.
@popcornmix please check with the GPU debugger to make sure that this doesn't give
L2 bad address exceptionlike it did when I tried this last year: #1178 (comment)Next step is to see if I can find which multi platform kconfig knob(s) that breaks the downstream drivers. CONFIG_ARM_PATCH_PHYS_VIRT=y is one suspect.