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ARM: dts: BCM2711 AON_INTR2 generates IRQ edges #4838

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Merged
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Jan 22, 2022
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ARM: dts: BCM2711 AON_INTR2 generates IRQ edges #4838

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4 changes: 2 additions & 2 deletions arch/arm/boot/dts/bcm2711.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -319,7 +319,7 @@
aon_intr: interrupt-controller@7ef00100 {
compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
reg = <0x7ef00100 0x30>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <1>;
status = "disabled";
Expand Down Expand Up @@ -402,7 +402,7 @@
<&clk_27MHz>;
resets = <&dvp 1>;
interrupt-parent = <&aon_intr>;
interrupts = <8>, <7>, <6>,
interrupts = <8>, <7>, <6>, // This is correct
<9>, <10>, <11>;
interrupt-names = "cec-tx", "cec-rx", "cec-low",
"wakeup", "hpd-connected", "hpd-removed";
Expand Down