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drivers: spi: Added ZynqMP Generic Quad SPI driver #88466

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drivers: spi: Added ZynqMP Generic Quad SPI driver #88466

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c413b60
drivers: spi: Added ZynqMP Generic Quad SPI driver
robhancocksed Mar 31, 2025
950f110
boards: qemu: cortex_r5: Added QSPI settings
robhancocksed Apr 10, 2025
c876ea7
dts: arm: xilinx: zynqmp: mark flash0 node as disabled
robhancocksed Jun 16, 2025
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8 changes: 8 additions & 0 deletions boards/qemu/cortex_r5/Kconfig.defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -13,4 +13,12 @@ config COMPILER_ISA_THUMB2

endif

if SPI_NOR

choice SPI_NOR_SFDP
default SPI_NOR_SFDP_DEVICETREE
endchoice

endif

endif # BOARD_QEMU_CORTEX_R5
33 changes: 33 additions & 0 deletions boards/qemu/cortex_r5/qemu_cortex_r5.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -31,3 +31,36 @@
status = "okay";
clock-frequency = <5000000>;
};

&qspi {
status = "okay";
clock-frequency = <124987511>;

flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-max-frequency = <166000000>;
jedec-id = [20 bb 20];
sfdp-bfp = [e5 20 fb ff ff ff ff 1f 29 eb 27 6b 27 3b 27 bb
ff ff ff ff ff ff 27 bb ff ff 29 eb 0c 20 10 d8
00 00 00 00 35 8a 01 00 82 a3 03 da 6c c1 04 2e
7a 75 7a 75 fb bd d5 5c 08 0f 82 ff 81 bd 35 36];
size = <0x20000000>;
};

flash@1 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x1>;
spi-max-frequency = <166000000>;
jedec-id = [20 bb 20];
sfdp-bfp = [e5 20 fb ff ff ff ff 1f 29 eb 27 6b 27 3b 27 bb
ff ff ff ff ff ff 27 bb ff ff 29 eb 0c 20 10 d8
00 00 00 00 35 8a 01 00 82 a3 03 da 6c c1 04 2e
7a 75 7a 75 fb bd d5 5c 08 0f 82 ff 81 bd 35 36];
size = <0x20000000>;
};
};
1 change: 1 addition & 0 deletions drivers/spi/CMakeLists.txt
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Expand Up @@ -69,6 +69,7 @@ zephyr_library_sources_ifdef(CONFIG_SPI_WCH spi_wch.c)
zephyr_library_sources_ifdef(CONFIG_SPI_XEC_QMSPI spi_xec_qmspi.c)
zephyr_library_sources_ifdef(CONFIG_SPI_XEC_QMSPI_LDMA spi_xec_qmspi_ldma.c)
zephyr_library_sources_ifdef(CONFIG_SPI_XLNX_AXI_QUADSPI spi_xlnx_axi_quadspi.c)
zephyr_library_sources_ifdef(CONFIG_SPI_XLNX_ZYNQMP_GQSPI spi_xlnx_zynqmp_gqspi.c)
zephyr_library_sources_ifdef(CONFIG_SPI_XMC4XXX spi_xmc4xxx.c)
# zephyr-keep-sorted-stop

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1 change: 1 addition & 0 deletions drivers/spi/Kconfig
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Expand Up @@ -146,6 +146,7 @@ source "drivers/spi/Kconfig.test"
source "drivers/spi/Kconfig.wch"
source "drivers/spi/Kconfig.xec_qmspi"
source "drivers/spi/Kconfig.xlnx"
source "drivers/spi/Kconfig.xlnx_zynqmp_gqspi"
source "drivers/spi/Kconfig.xmc4xxx"
source "drivers/spi/spi_nxp_lpspi/Kconfig"
# zephyr-keep-sorted-stop
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14 changes: 14 additions & 0 deletions drivers/spi/Kconfig.xlnx_zynqmp_gqspi
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Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
# Xilinx SPI

# Copyright (c) 2020 Henrik Brix Andersen <[email protected]>
# SPDX-License-Identifier: Apache-2.0

config SPI_XLNX_ZYNQMP_GQSPI
bool "Xilinx ZynqMP GQSPI driver"
default y
depends on DT_HAS_XLNX_ZYNQMP_QSPI_1_0_ENABLED
select EVENTS
help
Enable Xilinx ZynqMP Generic Quad SPI driver.
This is normally used with QSPI flash devices but can also be used
with other SPI devices.
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